Siemens S5-135U/155U - Manual (Page 172)

5-32
System Manual
C79000-G8576-C199-06
You can optionally use the second interface of the CPU 928B as:
S
A PG interface (for PG and operator panels)
S
Interface for the RK 512 computer link
S
Interface for data transmission with procedures 3964/3964R
S
Interface for data transmission with the “open driver”
S
Interface for data transmission via the SINEC L1 bus (from Version 6ES5
928-3UB12).
To utilize the second interface as the PG interface, you need the
S
RG submodule
You need one of the following interface submodules for the RK 512
computer link, for data transmission with procedures 3964/3964R and for
data transmission with the “open driver”:
S
V.24 submodule (RS 232C)
S
TTY submodule
S
RS422 A/485 submodule (only in the RS422 A mode).
To utilize the second interface for data transmission via the SINEC L1 bus,
you need the
S
SINEC L1 submodule (from Version 6ES5 928-3UB12).
The CPU 928B is delivered without an interface submodule. You can operate
the CPU 928B without an integral interface submodule. The opening to
accept a submodule in the front plate is closed by a cover. Only remove the
cover to fit an interface submodule.
A description of interface submodules can be found in Section 5.11, and the
order numbers in the ordering information.
A detailed description of the second interface can be found in the
CPU 928B/CPU 948 Communication Manual.
There is an interrupt line in the PLC for each CPU. It can be used when the
reaction to an event must occur with higher priority than the reaction to other
events.
To process an interrupt, cyclic program processing is interrupted and the
program stored in OB 2 (OB for interrupt processing) is inserted (refer to the
CPU 928B -3UB21 Programming Guide for further details).
This interrupt-driven program processing is only possible using an
interrupt-capable digital input module or a suitable operating CP/IP module.
No jumper setting on the CPU 928B is required. Please note, however, that
the usable interrupt line on the backplane bus depends on the CPU slot and
must be set accordingly on the I/O module (see Section 4.1).
Second Interface
SI2
Process Interrupt
Processing
CPUs, Memory Cards, Memory Submodules, Interface Submodules