NEC uPD78P078 - Manual (Page 105)

105
CHAPTER 5 CPU ARCHITECTURE
(1) Vector table area
The 64-byte area 0000H to 003FH is reserved as a vector table area. The RESET input and program start
addresses for branch upon generation of each interrupt request are stored in the vector table area. Of the
16-bit address, low-order 8 bits are stored at even addresses and high-order 8 bits are stored at odd
addresses.
Table 5-2. Vector Table
Vector Table Address Interrupt Request
0000H RESET input
0004H INTWDT
0006H INTP0
0008H INTP1
000AH INTP2
000CH INTP3
000EH INTP4
0010H INTP5
0012H INTP6
0014H INTCSI0
0016H INTCSI1
0018H INTSER
001AH INTSR/INTCSI2
001CH INTST
001EH INTTM3
0020H INTTM00
0022H INTTM01
0024H INTTM1
0026H INTTM2
0028H INTAD
002AH INTTM5
002CH INTTM6
003EH BRK
(2) CALLT instruction table area
The 64-byte area 0040H to 007FH can store the subroutine entry address of a 1-byte call instruction (CALLT).
(3) CALLF instruction entry area
The area 0800H to 0FFFH can perform a direct subroutine call with a 2-byte call instruction (CALLF).