NEC uPD78P078 - Manual (Page 125)

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CHAPTER 5 CPU ARCHITECTURE
5.4.4 Short direct addressing
[Function]
The memory to be manipulated in the fixed space is directly addressed with 8-bit data in an instruction word.
The fixed space to which this addressing is applied to is the 256-byte space, from FE20H to FF1FH. An internal
high-speed RAM and a special function register (SFR) are mapped at FE20H to FEFFH and FF00H to FF1FH,
respectively.
The SFR area where short direct addressing is applied (FF00H to FF1FH) is a part of the SFR area. In this area,
ports which are frequently accessed in a program, a compare register of the timer/event counter, and a capture
register of the timer/event counter are mapped and these SFRs can be manipulated with a small number of bytes
and clocks.
When 8-bit immediate data is at 20H to FFH, bit 8 of an effective address is set to 0. When it is at 00H to 1FH,
bit 8 is set to 1. Refer to [Illustration] below.
[Operand format]
Identifier Description
saddr Label of FE20H to FF1FH immediate data
saddrp Label of FE20H to FF1FH immediate data (even address only)
[Description example]
MOV 0FE30H, #50H; when setting saddr to FE30H and immediate data to 50H
Operation code 0 0 0 1 0 0 0 1 OP code
0 0 1 1 0 0 0 0 30H (saddr-offset)
0 1 0 1 0 0 0 0 50H (immediate data)
[Illustration]
When 8-bit immediate data is 20H to FFH,
α
= 0
When 8-bit immediate data is 00H to 1FH,
α
= 1
15 0
Short Direct Memory
Effective Address 1 1 1 1 1 1 1
8 7
0 7
OP code
saddr-offset
α