NEC uPD78P078 User Manual
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CHAPTER 10 8-BIT TIMER/EVENT COUNTERS 5 AND 6
(2) Timer clock select register 6 (TCL6)
This register sets count clocks of 8-bit timer register 6.
TCL6 is set with an 8-bit memory manipulation instruction.
RESET input sets TCL6 to 00H.
Figure 10-4. Timer Clock Select Register 6 Format
Note
When clock is input from the external, timer output (PWM output) cannot be used.
Caution When rewriting TCL6 to other data, stop the timer operation beforehand.
Remarks 1. f
XX
: Main system clock frequency (f
X
or f
X
/2)
2. f
X
: Main system clock oscillation frequency
3. TI6
: 8-bit timer register 6 input pin
4. MCS : Bit 0 of oscillation mode selection register (OSMS)
5. Figures in parentheses apply to operation with f
X
= 5.0 MHz.
0
0
0
0
TCL63 TCL62 TCL61 TCL60
7
6
5
4
3
2
1
0
Symbol
TCL6
TCL63 TCL62 TCL61 TCL60
0
0
0
0
TI6 falling edge
Note
0
0
0
1
TI6 rising edge
Note
0
1
0
0
f
XX
f
X
(Setting prohibited)
f
X
/2
(2.5 MHz)
0
1
0
1
f
XX
/2
f
X
/2
(2.5 MHz)
f
X
/2
2
(1.25 MHz)
0
1
1
0
f
XX
/2
2
f
X
/2
2
(1.25 MHz)
f
X
/2
3
(625 kHz)
0
1
1
1
f
XX
/2
3
f
X
/2
3
(625 kHz)
f
X
/2
4
(313 kHz)
1
0
0
0
f
XX
/2
4
f
X
/2
4
(313 kHz)
f
X
/2
5
(156 kHz)
1
0
0
1
f
XX
/2
5
f
X
/2
5
(156 kHz)
f
X
/2
6
(78.1 kHz)
1
0
1
0
f
XX
/2
6
f
X
/2
6
(78.1 kHz)
f
X
/2
7
(39.1 kHz)
1
0
1
1
f
XX
/2
7
f
X
/2
7
(39.1 kHz)
f
X
/2
8
(19.5 kHz)
1
1
0
0
f
XX
/2
8
f
X
/2
8
(19.5 kHz)
f
X
/2
9
(9.8 kHz)
1
1
0
1
f
XX
/2
9
f
X
/2
9
(9.8 kHz)
f
X
/2
10
(4.9 kHz)
1
1
1
0
f
X
/2
11
1
1
1
1
f
XX
/2
11
f
X
/2
11
(2.4 kHz)
(1.2 kHz)
MCS = 1
8-bit Timer Register 5 Count Clock Selection
MCS = 0
Other than above
Setting prohibited
FF56H
00H
R/W
Address
After Reset
R/W
2f
XX
(5.0 MHz)
f
X
(5.0 MHz)