NEC uPD78P078 User Manual
Page 27
27
LIST OF FIGURES (7/9)
Figure No.
Title
Page
19-21
Operation Timings when Using Busy & Strobe Control Option (BUSY0 = 0) ......................... 452
19-22
Operation Timing of the Bit Slippage Detection Function through the Busy Signal
(BUSY0 = 1) ................................................................................................................................ 453
19-23
Automatic Data Transmit/Receive Interval ................................................................................ 454
19-24
Operation Timing with Automatic Data Transmit/Receive Function Performed
by Internal Clock ......................................................................................................................... 455
20-1
Serial Interface Channel 2 Block Diagram ................................................................................ 458
20-2
Baud Rate Generator Block Diagram ........................................................................................ 459
20-3
Serial Operating Mode Register 2 Format ................................................................................ 461
20-4
Asynchronous Serial Interface Mode Register Format ............................................................. 462
20-5
Asynchronous Serial Interface Status Register Format ............................................................ 464
20-6
Baud Rate Generator Control Register Format ........................................................................ 465
20-7
Asynchronous Serial Interface Transmit/Receive Data Format ............................................... 478
20-8
Asynchronous Serial Interface Transmission Completion Interrupt Request Generation
Timing .......................................................................................................................................... 480
20-9
Asynchronous Serial Interface Reception Completion Interrupt Request Generation
Timing .......................................................................................................................................... 481
20-10
Receive Error Timing .................................................................................................................. 482
20-11
State of Receive Buffer Register (RXB) When Receive Operation is Stopped and
Whether Interrupt Request (INTSR) is Generated or Not ........................................................ 483
20-12
3-Wire Serial I/O Mode Timing .................................................................................................. 489
20-13
Circuit of Switching in Transfer Bit Order .................................................................................. 490
20-14
Receive Completion Interrupt Request Generation Timing (ISRM = 1) .................................. 491
20-15
Period that Reading Receive Buffer Register is Prohibited ..................................................... 492
21-1
Real-time Output Port Block Diagram ....................................................................................... 495
21-2
Real-time Output Buffer Register Configuration ....................................................................... 496
21-3
Port Mode Register 12 Format ................................................................................................... 497
21-4
Real-time Output Port Mode Register Format .......................................................................... 497
21-5
Real-time Output Port Control Register Format ........................................................................ 498
22-1
Basic Configuration of Interrupt Function .................................................................................. 502
22-2
Interrupt Request Flag Register Format .................................................................................... 505
22-3
Interrupt Mask Flag Register Format ......................................................................................... 506
22-4
Priority Specify Flag Register Format ........................................................................................ 507
22-5
External Interrupt Mode Register 0 Format ............................................................................... 508
22-6
External Interrupt Mode Register 1 Format ............................................................................... 509
22-7
Sampling Clock Select Register Format .................................................................................... 510
22-8
Noise Eliminator Input/Output Timing (during Rising Edge Detection) .................................... 511
22-9
Program Status Word Format .................................................................................................... 512
22-10
Flowchart from Non-Maskable Interrupt Generation to Acknowledge ..................................... 514
22-11
Non-Maskable Interrupt Request Acknowledge Timing ............................................................ 514
22-12
Non-Maskable Interrupt Request Acknowledge Operation ....................................................... 515