NEC uPD78P078 - Manual (Page 520)

520
CHAPTER 22 INTERRUPT FUNCTIONS
Figure 22-16. Multiple Interrupt Example (1/2)
Example 1. Two multiple interrupts generated
During interrupt INTxx servicing, two interrupt requests, INTyy and INTzz are acknowledged, and
a multiple interrupt is generated. An EI instruction is issued before each interrupt request
acknowledge, and the interrupt request acknowledge enable state is set.
Example 2. Multiple interrupt is not generated by priority control
The interrupt request INTyy generated during interrupt INTxx servicing is not acknowledged
because the interrupt priority is lower than that of INTxx, and a multiple interrupt is not generated.
INTyy request is retained and acknowledged after execution of 1 instruction execution of the main
processing.
PR = 0 : Higher priority level
PR = 1 : Lower priority level
IE = 0 : Interrupt request acknowledge disable
Main Processing
EI
INTxx
(PR = 1)
INTyy
(PR = 0)
IE = 0
EI
RETI
INTxx
Servicing
INTzz
(PR = 0)
IE = 0
EI
RETI
INTyy
Servicing
IE = 0
RETI
INTzz
Servicing
Main Processing INTxx
Servicing INTyy
Servicing
INTxx
(PR = 0)
1 Instruction
Execution
IE = 0
INTyy
(PR = 1)
EI IE = 0
EI
RETI
RETI