4 multiple interrupt servicing – NEC uPD78P078 User Manual

Page 519

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CHAPTER 22 INTERRUPT FUNCTIONS

22.4.4 Multiple interrupt servicing

A multiple interrupt consists in acknowledging another interrupt during the execution of the interrupt.

A multiple interrupt is generated only in the interrupt request acknowledge enable state (IE = 1) (except non-

maskable interrupt). As soon as an interrupt request is acknowledged, it enters the acknowledge disable state (IE

= 0). Therefore, in order to enable a multiple interrupt, it is necessary to set the interrupt enable state by setting

the IE flag (1) with the EI instruction during interrupt servicing.

Even in an interrupt enabled state, a multiple interrupt may not be enabled. However, it is controlled according

to the interrupt priority. There are two priorities, the default priority and the programmable priority. The multiple

interrupt is controlled by the programmable priority control.

If an interrupt request with the same or higher priority than that of the interrupt being serviced is generated, it

is acknowledged as a multiple interrupt. In the case of an interrupt with a priority lower than that of the interrupt

being processed, it is not acknowledged as a multiple interrupt.

Interrupt request not acknowledged as a multiple interrupt due to interrupt disable or a low priority is reserved

and acknowledged following one instruction execution of the main processing after the completion of the interrupt

being serviced.

During non-maskable interrupt servicing, multiple interrupts are not enabled.

Table 22-4 shows an interrupt request enabled for multiple interrupt during interrupt servicing, and Figure 22-

16 shows multiple interrupt examples.

Table 22-4. Interrupt Request Enabled for Multiple Interrupt during Interrupt Servicing

Maskable Interrupt Request

xxPR = 0

xxPR = 1

IE = 1

IE = 0

IE = 1

IE = 0

Non-maskable interrupt

D

D

D

D

D

ISP = 0

E

E

D

D

D

ISP = 1

E

E

D

E

D

Software interrupt

E

E

D

E

D

Remarks 1. E : Multiple interrupt enable

2. D : Multiple interrupt disable

3. ISP and IE are the flags contained in PSW

ISP = 0 : An interrupt with higher priority is being serviced

ISP = 1 : An interrupt request is not accepted or an interrupt with lower priority is

being serviced

IE = 0

: Interrupt request acknowledge is disabled

IE = 1

: Interrupt request acknowledge is enabled

4. xxPR is a flag contained in PR0L, PR0H, and PRIL

xxPR = 0 : Higher priority level

xxPR = 1 : Lower priority level

Non-maskable

Interrupt

Request

Multiple Interrupt

Request

Interrupt being Serviced

Maskable interrupt

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