NEC uPD78P078 - Manual (Page 61)

61
CHAPTER 2 OUTLINE (
µ
PD78078Y SUBSERIES)
Part Number
2.8 Outline of Function
Mask ROM PROM
48 Kbytes 60 Kbytes 60 Kbytes Note 1
High-speed RAM 1024 bytes
Buffer RAM 32 bytes
Expansion RAM 1024 bytes 1024 bytes
Memory space 64 Kbytes
General register 8 bits x 8 x 4 banks
With main system clock selected 0.4
µ
s/0.8
µ
s/1.6
µ
s/3.2
µ
s/6.4
µ
s/12.8
µ
s (@ 5.0-MHz operation)
With subsystem clock selected 122
µ
s (@ 32.768-kHz operation)
Instruction set • 16-bit operation
• Multiply/divide (8-bit x 8-bit, 16-bit/8-bit)
• Bit manipulate (set, reset, test, and Boolean operation)
• BCD adjust, etc.
I/O port Total : 88
• CMOS input : 2
• CMOS input/output : 78
• N-ch open drain I/O : 8
A/D converter 8-bit resolution x 8 channels
D/A converter 8-bit resolution x 2 channels
Serial interface • 3-wire serial I/O/2-wire serial I/O/I 2 C bus mode selection : 1 channel
possible
• 3-wire serial I/O mode (maximum 32-byte on-chip automatic
transmit/receive function) : 1 channel
• 3-wire serial I/O/UART mode selection possible : 1 channel
Timer • 16-bit timer/event counter : 1 channel
• 8-bit timer/event counter : 4 channels
• Watch timer : 1 channel
• Watchdog timer : 1 channel
Timer output 5 outputs: (14-bit PWM output enable: 1, 8-bit PWM output enable: 2)
Clock output 19.5 kHz, 39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz,
2.5 MHz, 5.0 MHz (@ 5.0-MHz operation with main system clock)
32.768 kHz (@ 32.768-kHz operation with subsystem clock)
Buzzer output 1.2 kHz, 2.4 kHz, 4.9 kHz, 9.8 kHz
(@ 5.0-MHz operation with main system clock)
Notes 1. The capacity of the internal PROM can be changed using the internal memory size switching register
(IMS).
2. The capacity of the internal expansion RAM can be changed using the internal expansion RAM size
switching register (IXS).
ROM
Internal
memory
Minimum
instruction
execution
time
µ
PD78076Y
µ
PD78078Y
µ
PD78P078Y
Item