NEC uPD78P078 - Manual (Page 129)

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CHAPTER 5 CPU ARCHITECTURE
5.4.8 Based indexed addressing
[Function]
The B or C register contents specified in an instruction are added to the contents of the base register, that is,
the HL register pair, and the sum is used to address the memory. The HL, B, and C registers to be accessed
are registers in the register bank specified with the register bank select flag (RBS0 and RBS1).
Addition is performed by expanding the contents of the B or C register as a positive number to 16 bits. A carry
from the 16th bit is ignored. This addressing can be carried out for all the memory spaces.
[Operand format]
Identifier Description
— [HL + B], [HL + C]
[Description example]
In the case of MOV A, [HL + B]
Operation code 1 0 1 0 1 0 1 1
5.4.9 Stack addressing
[Function]
The stack area is indirectly addressed with the stack pointer (SP) contents.
This addressing method is automatically employed when the PUSH, POP, subroutine call and RETURN
instructions are executed or the register is saved/reset upon generation of an interrupt request.
Stack addressing enables to address the internal high-speed RAM area only.
[Description example]
In the case of PUSH DE
Operation code 1 0 1 1 0 1 0 1