NEC uPD78P078 User Manual
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CHAPTER 18 SERIAL INTERFACE CHANNEL 0 (
µ
PD78078Y Subseries)
(3) Register setting
The I
2
C bus mode is set with the serial operating mode register 0 (CSIM0), the serial bus interface control
register (SBIC), and the interrupt timing specify register (SINT).
(a) Serial operating mode register 0 (CSIM0)
CSIM0 is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets 00H.
R/W
CSIM01
CSIM00
Serial Interface Channel 0 Clock Selection
0
x
Input clock from off-chip to SCL pin
1
0
8-bit timer register 2 (TM2) output
Note 2
1
1
Clock specified with bits 0 to 3 of timer clock select register 3 (TCL3)
R/W
CSIM CSIM
CSIM PM25 P25
PM26 P26
PM27 P27
Operation
Start
SI0/SB0/SDA0/ SO0/SB1/SDA1/ SCK0/SCL/P27
04
03
02
mode
bit
P25 pin function P26 pin function pin function
0
x
3-wire serial I/O mode (see 18.4.2 3-wire serial I/O mode operation)
1
1
0
x
x
0
0
0
1
2-wire
MSB
P25
SB1/SDA1
SCK0/SCL
Note 3 Note 3
serial I/O or
(CMOS I/O)
N-ch open-
N-ch open-
I
2
C bus mode
drain I/O
drain I/O
1
1
1
0
0
x
x
0
1
2-wire
MSB
SB0/SDA0
P26
SCK0/SCL
Note 3 Note 3
serial I/O or
N-ch open-
(CMOS I/O)
N-ch open-
I
2
C bus mode
drain I/O
drain I/O
R/W
WUP
Wake-up Function Control
Note 4
0
Interrupt request signal generation with each serial transfer in any mode
1
In I
2
C bus mode, interrupt request signal is generated when the address data received after start condition detection
(when CMDD = 1) matches data in slave address register (SVA).
R
COI
Slave Address Comparison Result Flag
Note 5
0
Slave address register (SVA) not equal to data in serial I/O shift register 0 (SIO0)
1
Slave address register (SVA) equal to data in serial I/O shift register 0 (SIO0)
R/W
CSIE0
Serial Interface Channel 0 Operation Control
0
Stops operation.
1
Enables operation.
Notes 1. Bit 6 (COI) is a read-only bit.
2. In the I
2
C bus mode, the clock frequency is 1/16 of the clock frequency output by TO2.
3. Can be used freely as a port.
4. Set bit 5 (SIC) of the interrupt timing specify register (SINT) to 1 when using the wake-up function
(WUP = 1). Do not execute a write instruction to the serial I/O shift register 0 (SIO0) while WUP = 1.
5. When CSIE0 = 0, COI is 0.
Remark
x
: Don’t care
PMxxx : Port mode register
Pxx
: Port output latch
<6>
<5>
4
3
2
1
0
<7>
Symbol
CSIM0
FF60H 00H R/W
Note 1
Address After Reset R/W
CSIE0 COI
WUP
CSIM04 CSIM03 CSIM02 CSIM01 CSIM00