Cirrus Logic EP73xx - Manual (Page 102)

10-2 EP7309/11/12 User’s Manual - DS508UM4
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Copyright Cirrus Logic, Inc. 2003
Keyboard Interface
10
Operational Overview
The keyboard interface is made up of an 8x8 array of column drive to GPIO (port A)
pins and an interrupt for a keypress. When the keyboard interrupt is enabled, all
GPIO pins on port A are ORed together internally. This allows any keypress (if port A
is used) to generate an interrupt when required. Additional keys can be accounted for
by using the expansion bus to read the key configuration
The keyboard interface interrupt capability allows an OS (Operating System) to use
either a polled or interrupt-driven keyboard routine, or a combination of the two.
The array of column pins are configured to be one of three states: high, low, or high-Z-
state. The GPIOs in port A are then configured as inputs for the eight rows to
complete the 8x8 matrix. For a standard keyboard interface, the column drives are
asserted high to allow for a logic 1 to be read on the port A pins. This is accomplished
by driving high one column pin at a time and then reading from the GPIO port.
The external keyboard, properly connected will close the contact on the column drive
pin to the GPIO pin, so that the value for that key can then be read on port A. The
keyboard scan is programmed at SYSCON1 bits [0:3]. See the SYSCON1 register
description in
Chapter 5 . There is no internal debounce circuitry on-chip. Debounce
for a keypress will need to be handled in software to eliminate spurious or redundant
character entry.
Keyboard interrupt is cleared by writing to the KBDEOI register as seen in the
example code.
Keyboard Interrupt Matrix
The keyboard interrupt can be programmed by setting bits in the SYSCON registers.
Internally, all of the port A pins are ORed together so that a single keypress within the
8x8 matrix can generate an interrupt.
Note: The interrupt is level triggered, not edge triggered.
There are several configurations for a keyboard interrupt:
• KBWEN (SYSCON2 bit 3): If cleared, a keypress will cause a transition to
operating state from Standby. The interrupt mask (INTMR2 bit 0) must be
set.
Note: When KBWEN and the mask is also cleared, EP73xx can only wakeup by
means of the external WAKEUP pin or another interrupt source (enabled).
• KBWEN is set: keypress will cause the device to transition to Operating
state regardless of the interrupt mask. This is known as “Keyboard Direct
Wakeup” mode. If the corresponding interrupt mask is cleared, the
processor will continue executing code from point where it was preempted
by the change in state. If the mask is set, the processor will branch to the
ISR (Interrupt Service Routine) to service this interrupt.
• KBD6 (SYSCON2 bit 1) is cleared: All of Port A pins are Or’ed together to
produce an internal wakeup signal and keyboard interrupt request. This is