Cirrus Logic EP73xx - Manual (Page 39)

EP7309/11/12 User’s Manual - DS508UM4 2-13
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Copyright Cirrus Logic, Inc. 2003
CPU Core
22
2
logic ( CLKEN ) pin can be used to disable external oscillator if desired. In
this configuration,
• RTC remains on.
Entering standby state can be accomplished in software by writing to the STDBY
register, or in hardware with input from the
nURESET or by nPWRFL.
Before entering the standby state, the software must properly disable the DAI. Failing
to do so will result in higher than expected power consumption while in this state as
well as unpredictable behavior of the DAI.
During standby state, all system memory and state are maintained and the system
time is kept up-to-date. The external address and data bus are forced low internally
by the
RUN signal which is also driven low. This is done to prevent peripherals that
are powered down from draining current. Since the RUN signal is driven low, it can
also be used to disable external devices to further reduce power drain while in this
state. The internal peripherals external signals return to their reset state.
Exiting standby is accomplished with the following external stimulus of a keyboard
interrupt (if enabled), power management inputs, external interrupts
EINT[3:1] , or
WAKEUP .
The following register will allow the system software to put the processor into
Standby state. Writing to this location will not clear the internal registers settings of
the processor. The processor will sit until an external interrupt or the
WAKEUP pin is
asserted and continue executing code from the point of entry into Standby.
State Control Register Descriptions
Enter the Standby State Register (STDBY)
Address: 0x8000.0840, Write Only
Definition: A write to this location will put the system into the Standby State by
halting the main oscillator. A write to this location while there is an
active interrupt will have no effect.
Note: Before entering the Standby State, the LCD Controller should be disabled. The
LCD controller should be enabled on exit from the Standby State. If the EP73XX
is attempting to get into the Standby State when there is a pending interrupt
request, it will not enter into the low power mode. The instruction will get
executed, but the processor will ignore the command.
Idle State
From operating state, the processor can enter Idle state by writing to the HALT
register of the EP73xx. When an interrupt occurs, the processor will return to the
operating state and execute the next instruction.
WAKEUP cannot be used.
In the Idle state, the device will function as it would in operating state with the
exception of the CPU clock which is halted. The PLL (if enabled) or the external
13 MHz clock source will remain active during this state.