Dai data register 1 (daidr1), Dai data register 1 (daidr1) -15 – Cirrus Logic EP73xx User Manual
Page 139
EP7309/11/12 User’s Manual - DS508UM4
16-15
Copyright Cirrus Logic, Inc. 2003
DAI/CODEC/SSI2
1616
16
Data Write: Data is received by the DAI from the system software and is
placed at the top of the transmit FIFO. The data is then shifted
down to the lowest location in the FIFO. The transmit logic from
the DAI removes data from the lowest location, load the data into
the correct position within the 64-bit serial shifter, then shifts the
data out onto the
SDOUT
pin with the appropriate clocks.
DAI Data Register 1 (DAIDR1)
Address:
0x8000.2080, Read / Write
Bit Descriptions:
[0:15]:
Bottom Left Receive and Top Left Transmit FIFO. Data is filed and
extracted from the Left Channel FIFOs using this register.
Data Read: Data received by the DAI machine from external hardware and is
placed the top of the receive FIFO and shifted down for each new
entry into the FIFO until it reaches the last empty location within
the FIFO. Data is removed from the FIFO by a system software
read from the bottom of the FIFO. The bottom value is the
replaced by the next value as all information with the FIFO is then
shifted down one location.
Data Write: Data is received by the DAI from the system software and is
placed at the top of the transmit FIFO. The data is then shifted
down to the lowest location in the FIFO. The transmit logic from
the DAI removes data from the lowest location, load the data into
the correct position within the 64-bit serial shifter, then shifts the
data out onto the
SDOUT
pin with the appropriate clocks.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bottom Left Channel Receive FIFO / Top Left Channel Transmit FIFO