Cirrus Logic EP73xx - Manual (Page 127)

EP7309/11/12 User’s Manual - DS508UM4 16-3
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Copyright Cirrus Logic, Inc. 2003
DAI/CODEC/SSI2
1616
16
ldr r1, =DAISEL
str r1, [r12, #0x100] ; Select DAI in SYSCON1 0x8000.0100
ldr r1, =DAI64FS
add r11,r11,#0x1000 ; Set 0x8000.2000 base address
str r1, [r11, #0x600] ; Set DAI64FS 0x8000.2600
ldr r1, [r11, #0x200]
mov r0, #1
bic r1, r1, r0, lsl #9 ; Clear bit 9 in SYSCON3 for 64fs
str r1, [r11, #0x200] ; Set 64fs mode in SYSCON3 0x8000.2000
ldr r1, =DAIEN
str r1, [r11, #0x0] ; Enable DAI at 0x8000.2000
ldr r1, =DAISTATUS
str r1, [r11, #0x100] ; Clear Status Register
;
Operational Overview
DAI/CODEC/SSI2 MUX
The DAI, CODEC, and the SSI2 interfaces share the same set of external pins on the
EP73xx. In addition to enabling only one of these interfaces, a MUX must be
programmed to select the interface to be used with the SSI pins.
Figure 16-1 on
page 16-2 illustrates this MUX. Table 16-2 is a matrix detailing the minimum set of
configuration bits that must be programmed to properly use one of these interfaces.
(H) = High (Set)
(X) = Don’t care
To program the MUX, you will need to do the following: To connect the port to any of
the 4 features shown above, a minimum software configuration shown in the table
above must be observed. Each register column contains the bit name (bit #) that must
be cleared or set for each feature as shown in the column. This table does not
complete the programming for each of the features, but allows access to the port only.
The interrupt masks for these features will have to be programmed as well.
Table 16-2: Matrix for Programming the MUX
FEATURE SYSCON2 SYSCON3 DAI64 Fs DAIR(DAI)
DAI –128Fs (X) DAISEL[3] (H) I2SF64[0] (L) DAIEN[16] (H)
128Fs[9] (H)
DAI-64Fs (X) DAISEL[3] (H) I2SF64[0] (H) DAIEN[16] (H)
128Fs[9] (L)
SSI2 SERSEL[0] (L) (X) (X) DAIEN[16] (L)
CODEC SERSEL[0] (H) (X) (X) DAIEN[16] (L)