Cirrus Logic EP73xx - Manual (Page 28)

2-2 EP7309/11/12 User’s Manual - DS508UM4
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Copyright Cirrus Logic, Inc. 2003
CPU Core
2
Block Diagram
Detailed block diagram of the core is shown below.
Programming Examples
;*****************************************************************************
; Set up the MMU. Start by flushing the cache and TLB.
;*****************************************************************************
;
ldr r0, =0x00000000
mcr p15, 0, r0, c5, c0 ; co-processor register c5
mcr p15, 0, r0, c7, c0 ; co-processor register c7
;
;*****************************************************************************
; Set user mode access for all 16 domains.
;*****************************************************************************
Figure 2-1. ARM720T Block Diagram
M M U 8 K by te C a c h e
A R M 7 TD M I
C P U
A M B A
In te rfa ce
S y ste m
C o n tro l
C o p ro ce sso r
W rite B u ffe r
A M B A
a d d re ss
A M B A
d a ta
In te rn a l D a ta B u s
V irtu a l A d d re ss B u s
C o p ro ce sso r
In te rfa ce
JT A G
D e bu g
In te rfa ce