Cirrus Logic EP73xx - Manual (Page 25)

EP7309/11/12 User’s Manual - DS508UM4 1-11
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Copyright Cirrus Logic, Inc. 2003
Introduction
11
1
Block Diagrams
Figure 1-1. EP73xx Block Diagram
32.768-kHz
OSCILLATOR
PLL
INTERRUPT
CONTROLLER
POWER
MANAGEMENT
SDRAM CNTRL
LCD
CONTROLLER
ARM7TDMI
CPU
CORE
8-KBYTE
CACHE
MMU
TIMER
COUNTERS(2)
ARM720T
INTERNAL DATA BUS
3.6864 MHz
32.768 kHz
EINT[1-3], FIQ,
MEDCHG
BATOK, EXTPWR
PWRFL, BATCHG
UART2
IrDA
D[0-31]
nPOR, RUN,
RESET, WAKEUP
EXPCLK, WORD, nCS[0-3],
EXPRDY, WRITE
MOE, MWE, SDCLK,
SDQM[0-3], SDRAS,
SDCAS
A[0-27],
DRA[0-14]
LCD DRIVE
LED AND
PHOTODIODE
ASYNC
INTERFACE 2
INTERNAL ADDRESS BUS
13-MHz INPUT
ON-CHIP
BOOT ROM
ASYNC
INTERFACE 1
ON-CHIP
SRAM
48 KBYTES
EXPANSION CNTRL
UART1 EPB BRIDGE
EPB BUS
ICE-JTAG TEST AND
DEVELOPMENT
WRITE
BUFFER
MEMORY CONTROLLER
LCD
SSI1
PWM
ADCCLK, ADCIN,
ADCOUT,
SMPCLK, ADCCS
SSICLK, SSITXFR,
SSITXDA, SSIRXDA,
SSIRSFR
DC TO DC
PORTS A, B, D (8-BIT)
PORT E (3-BIT)
KEYBD DRIVERS (0-7)
GPIO
RTC FLASHING LED DRIVE
CODEC
SSI2
DAI
STATE
CONTROL
MaverickKey™