Rockwell Automation SA3100 Distributed Power System Drv Config,Program - Manual (Page 59)

Configuring the UDC Module’s Registers 3-21
Drive Control Register (Continued) 100/1100
Synchronous Transfer Request* Bit 7
*Reserved for future use.
The application task sets the Synchronous
Transfer Request bit to begin matching the
Voltage, Period, and Phase of the drive’s
PWM output to an external source.
Hex Value: 0080H
Sug. Var. Name: SX_REQ@
Access: Read/Write
UDC Error Code: N/A
LED: N/A
When synchronization is ready, register 200, bit 7 (SYN_OK@) is turned on to
indicate that the synchronous transfer may be done.
Fault Reset Bit 8
The Fault Reset bit is set and reset to clear
the Drive Fault register 202/1202. After a
drive fault is latched, the Drive Fault register
must be cleared before the drive can be re-
started. Hex Value: 0100H
Sug. Var. Name: FLT_RST@
Access: Read/Write
UDC Error Code: N/A
LED: N/A
To clear the Drive Fault register any command bits that have been set in the Drive
Control register (100/1100) must first be turned off. Once the cause of the fault has
been corrected, the Fault Reset bit must be turned on and then off again. The Fault
Reset bit will clear the entire Drive Fault register. Then the desired command bits
may be turned on again.
The Fault Reset bit is edge-sensitive, i.e., leaving it set will not clear the fault register
continuously. Note that if the fault condition still exists after register 202/1202 is
cleared, it will continue to trigger drive faults until the problem has been corrected.
Warning Reset Bit 9
The Warning Reset bit is set and reset to
clear the Drive Warning register
203/1203. This bit is edge-sensitive, i.e.,
leaving it set will not clear the warning
register continuously. Hex Value: 0200H
Sug. Var. Name: WRN_RST@
Access: Read/Write
UDC Error Code: N/A
LED: N/A
Bit 10
Reserved for future use. Hex Value: 0400H
Sug. Var. Name:
Access:
Read only
UDC Error Code: N/A
LED: N/A