BECKHOFF EtherCAT Technology Section I - Manual (Page 43)

Ethernet Physical Layer
Slave Controller – Technology I-23
5.6.2 MI Link Detection and Configuration
The EtherCAT IP Core supports link detection and PHY configuration by using the MII management
interface. Initially, the PHY configuration is checked and updated if necessary. Afterwards, the link
status of each Ethernet port is cyclically polled. PHY accesses of the EtherCAT master are inferred
upon request.
The MI Link Configuration mechanism configures the Ethernet PHYs to use Auto negotiation and
advertise only 100BASE-TX Full-Duplex connections. Some ESCs support using Gigabit Ethernet
PHYs, which are restricted to 100 Mbit/s links by the MI Link Configuration. ESCs which support FX
operation natively are configuring the FX ports to use fixed 100BASE-TX Full-Duplex connections
without Auto negotiation.
Depending on the physical layer configuration and the supported ESC features (e.g., TX vs. FX), the
MI Link Detection will check if the link characteristics fulfill EtherCAT requirements (Auto negotiation,
Speed, Duplex, etc.). If all conditions are met, an MI Link is detected.
Since the MI Link Detection does not solely rely on the PHY link status bit (register 1[2]), the local PHY
and the remote PHY may indicate a link, but the ESC refuses it because it does not fulfill EtherCAT
requirements. The current MI Link Detection state is reflected in the MI Interface registers (PHY Port
Status 0x0518:0x051B).
MI Link Detection and Configuration must not be used without link detection via LINK_MII signals,
because link loss reaction time would otherwise be to slow for redundancy operation. Enhanced Link
Detection might not be a suitable solution in this case if too few RX_ERR are issued to the ESC before
the PHY takes down the link.
NOTE: For testing it is possible to use MI Link Detection without LINK_MII signals: If the LINK_MII signals are
statically set to “no link”, only MI Link Detection is used.
The MI Link Detection and Configuration checks the management communication with Ethernet PHYs.
If communication is not possible
– e.g. because no PHY is configured for the expected PHY address –
the results are ignored. Take care of proper PHY address configuration to prevent erroneous behavior.
NOTE: Proper PHY address settings and PHY address offset configuration is crucial for MI Link Detection and
Configuration.
5.7 Standard and Enhanced MII Link Detection
For Ethernet, the standard or enhanced MII link detection feature is a feature of link error detection
and reaction. This has to be distinguished from the actual link detection, which tells the ESC if a
physical link is available (i.e., the LINK_MII signal or the MI link detection and configuration
mechanism).
Enhanced MII link detection, in contrast to standard MII link detection, will additionally disconnect a
link if at least 32 RX errors (RX_ER) occur in a fixed interval of time (~10 µs). The local loop is closed
and the link partner is informed by restarting the Auto-Negotiation mechanism via the MII Management
Interface. This informs the link partner of the error condition, and the link partner will close the loop.
The ESC keeps the port closed until the link goes down during Auto-Negotiation and comes up again
(the port remains closed if the link does not go down).
The availability of Enhanced MII Link Detection depends on a supported PHY address configuration,
otherwise it has to be disabled.