9 distributed clocks, 1 clock synchronization, Distributed clocks – BECKHOFF EtherCAT Technology Section I User Manual

Page 67: Clock synchronization

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Distributed Clocks

Slave Controller

– Technology

I-47

9

Distributed Clocks

The Distributed Clocks (DC) unit of EtherCAT slave controllers supports the following features:

Clock synchronization between the slaves (and the master)

Generation of synchronous output signals (SyncSignals)

Precise time stamping of input events (LatchSignals)

Generation of synchronous interrupts

Synchronous Digital Output updates

Synchronous Digital Input sampling

9.1

Clock Synchronization

DC clock synchronization enables all EtherCAT devices (master and slaves) to share the same
EtherCAT System Time. The EtherCAT devices can be synchronized to each other, and
consequently, the local applications are synchronized as well.

For system synchronization all slaves are synchronized to one Reference Clock. Typically, the first
ESC with Distributed Clocks capability after the master within one segment holds the reference time
(System Time). This System Time is used as the reference clock to synchronize the DC slave clocks
of other devices and of the master. The propagation delays, local clock sources drift, and local clock
offsets are taken into account for the clock synchronization.

The ESCs can generate SyncSignals for local applications to be synchronized to the EtherCAT
System Time. SyncSignals can be used directly (e.g., as interrupts) or for Digital Output
updating/Digital Input sampling. Additionally, LatchSignals can be time stamped with respect to the
EtherCAT System Time.

Definition of the System Time

Beginning on January, 1

st

2000 at 0:00h

Base unit is 1 ns

64 bit value (enough for more than 500 years)

Lower 32 bits span over 4.2 seconds (typically enough for communication and time stamping).
Some ESCs only have 32 bit DCs, which are compatible with 64 bit DCs.

Definition of the Reference Clock
One EtherCAT device will be used as a Reference Clock. Typically, the Reference Clock is the first
ESC with DC capability between master and all the slaves to be synchronized (DC slaves). The
Reference Cl

ock might be adjusted to a “global” reference clock, e.g. to an IEEE 1588 grandmaster

clock. The reference clock provides the System Time.

Definition of the Local Clock
Each DC slave has a local clock, initially running independent of the Reference Clock. The difference
between local clock and Reference Clock (offset) can be compensated, as well as clock drifts. The
offset is compensated by adding it to the local clock value. The drift is compensated by measuring and
adjusting the local clock speed.

Each DC slave holds a copy of the Reference Clock, which is calculated from the local clock and the
local offset. The Reference Clock has a local clock, too.

Definition of the Master Clock
The Reference Clock is typically initialized by the EtherCAT master using the master clock to deliver
the System Time according to the System Time definition. The EtherCAT master clock is typically
bound to a global clock reference (RTC or the master PC, IEEE1588, GPS, etc.), which is either
directly available to the master or indirectly by an EtherCAT slave providing access to the reference.

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