BECKHOFF EtherCAT Technology Section I - Manual (Page 8)

CONTENTS
I-VIII Slave Controller – Technology
9.1.6 Reference between DC Registers/Functions and Clocks 58
9.1.7 When is Synchronization established? 59
9.1.8 Clock Synchronization Initialization Example 59
9.2 SyncSignals and LatchSignals 60
9.2.1 Interface 60
9.2.2 Configuration 60
9.2.3 SyncSignal Generation 61
9.2.4 LatchSignals 64
9.2.5 ECAT or PDI Control 65
9.3 System Time PDI Controlled 66
9.4 Communication Timing 68
10 EtherCAT State Machine 70
10.1 EtherCAT State Machine Registers 71
10.1.1 AL Control and AL Status Register 71
10.1.2 Device Emulation 71
10.1.3 Error Indication and AL Status Code Register 71
11 SII EEPROM 72
11.1 SII EEPROM Content 73
11.2 SII EEPROM Logical Interface 74
11.2.1 SII EEPROM Errors 75
11.2.2 SII EEPROM Interface Assignment to ECAT/PDI 76
11.2.3 Read/Write/Reload Example 77
11.2.4 EEPROM Emulation 77
11.3 SII EEPROM Electrical Interface (I 2 C) 78
11.3.1 Addressing 78
11.3.2 EEPROM Size 78
11.3.3 I²C Access Protocol 79
11.3.4 Timing specifications 80
12 Interrupts 82
12.1 AL Event Request (PDI Interrupt) 82
12.2 ECAT Event Request (ECAT Interrupt) 83
12.3 Clearing Interrupts Accidentally 83
13 Watchdogs 84
13.1 Process Data Watchdog 84
13.2 PDI Watchdog 84
14 Error Counters 85
14.1 Frame error detection 86
14.2 Errors and Forwarded Errors 86
15 LED Signals (Indicators) 87
15.1 RUN LED 87
15.1.1 RUN LED override 87