Avago Technologies LSI53C1000R User Manual
Page 136
4-24
Registers
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Full Arbitration, Selection/Reselection
1.
The LSI53C1000R waits for a bus free condition.
2.
It asserts SBSY/ and its SCSI ID onto the SCSI bus.
The SCSI ID asserted is the highest priority ID
stored in the
register.
3.
If the SSEL/ signal is asserted by another SCSI
device or if the LSI53C1000R detects a higher
priority ID, the LSI53C1000R deasserts SBSY/,
deasserts its ID, sets the Lost Arbitration bit, bit 3 in
the
register, and waits
until the next bus free state to try arbitration again.
4.
The LSI53C1000R repeats arbitration until it wins
control of the SCSI bus. When it wins, the Won
Arbitration bit is set in the
register, bit 2.
5.
The LSI53C1000R performs selection by asserting
SSEL/, the target’s ID (stored in the
register), and the
LSI53C1000R’s ID (stored in the
register) onto the SCSI bus.
6.
After a selection is complete, the Function Complete
bit is set in the
SCSI Interrupt Status Zero (SIST0)
register, bit 6.
7.
If a selection time-out occurs, the Selection Time-Out
bit is set in the
SCSI Interrupt Status One (SIST1)
register, bit 2.
START
Start Sequence
5
When this bit is set, the LSI53C1000R starts the
arbitration sequence indicated by the Arbitration Mode
bits. The Start Sequence bit is accessed directly in
low-level mode; during SCSI SCRIPTS operations, this
bit is controlled by the SCRIPTS processor. Do not start
an arbitration sequence if the connected (CON) bit in the
register, bit 4, is set. This
bit indicates that the LSI53C1000R is already connected
to the SCSI bus. This bit is automatically cleared when