Rear panel connector connectors pinout diagrams – Anritsu 681XXC User Manual

Page 228

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681XXC OM

A-5

PIN

SIGNAL NAME

SIGNAL DESCRIPTION

14

V/GHz

V/GHz Output: Provides a reference voltage relative to the RF output frequency
(1.0 V/GHz for Models 68117C, 68137C, and 68147C; 0.5 V/GHz for Model
68167C; 0.25V/GHz for Models 68177C, 68187C, and 68197C).

15

EOS INPUT

End-of-Sweep Input: Accepts a TTL high-level signal to tell the signal generator
to begin the end of sweep dwell.

16

EOS OUTPUT

End-of-Sweep Output: Provides a TTL high-level signal when the signal genera-
tor has begun the end of sweep dwell.

17

AUX 1

Aux 1: Auxiliary input/output to the processor (PB6).

18

SWP DWELL IN

Sweep Dwell Input: Permits a TTL low-level signal to stop the sweep in both ana-
log- and step-sweep modes. The sweep resumes when the signal is removed.

19

AUX 2

Aux 2: Auxiliary input/output to the processor (PC3).

20

BANDSWITCH BLANK

Bandswitch Blanking Output: Provides a +5V or –5V signal coincident with band-
switching points. Signal polarity is selected from a front panel menu.

21

SPARE

22

HORIZ IN

Horizontal Sweep Input: Accepts a 0V to 10V external sweep ramp from a Master
signal generator. This input is automatically selected when the signal generator is
in the Slave Mode.

23

Return

Horizontal Sweep Input return.

24

TXb

TXb: Serial Data Output from the processor.

25

MEMORY SEQ

Memory Sequencing Input: Accepts a TTL low-level signal to sequence through
nine stored, front panel setups.

Figure A-2.

Pinout Diagram, AUX I/O Connector (2 of 2)

REAR PANEL

CONNECTOR

CONNECTORS

PINOUT DIAGRAMS

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