Altera Stratix V Avalon-ST - Manual (Page 37)

# INFO: 73354 ns TASK:my_test Memory write burst at addr=0x08
# with wdata=0x10203040
# INFO: 73362 ns TASK:my_test => 2.21 Memory Read burst
# INFO: 74178 ns TASK:my_test Memory write burst at addr=0x0C
# with wdata=0x10203040
# INFO: 88154 ns Enumerate EP function = 0x01
# INFO: 88154 ns cfgbp_enum_config_space Setup config space
# for func = 00000001
# INFO: 88154 ns Config Read # INFO: 88946 ns CfgRD at
# addr =0x00000000 returns data = 0xE0011172
# INFO: 88946 ns Set Bus_Master and Memory_Space_Enable
# bit in Command register00000001
# INFO: 88946 ns Read Modified WRite to config register
# = 0x00000004 in func = 0x00000001
# INFO: 115370 ns TASK:my_test; 2.21 Memory Read burst
# SUCCESS: Simulation stopped due to successful completion!
# Break in Function ebfm_log_stop_sim at
# /..//top_tb/simulation/submodules//altpcietb_bfm_log.v line 78
# INFO: 88946 ns Set Bus_Master and Memory_Space_Enable bit
# in Command register00000001
# INFO: 88946 ns Read Modified WRite to config register =
# 0x00000004 in func = 0x00000001
# INFO: 88946 ns Set Bus_Master and Memory_Space_Enable bit
# in Command register00000001
# INFO: 88946 ns Read config reg
# INFO: 89738 ns Original config read data = 00000000
# INFO: 89738 ns Config write with data = 00000006
# INFO: 91338 ns After cfg_rd_modified_wr, config_data
# = 0x00000006
# INFO: 92938 ns CfgRD at BAR0 (addr =0x00000010) returns
# data = 0xFFF0000C
# INFO: 94530 ns CfgRD at addr =0x00000010 returns data
# = 0x8000000C
# INFO: 97658 ns BAR Address Assignments:
# INFO: 97658 ns BAR Size Assigned Address Type
# INFO: 97658 ns BAR1:0 1 MBytes 00000001 00000000 Prefetchable
# INFO: 97658 ns BAR2 Disabled
# INFO: 97658 ns BAR3 Disabled
# INFO: 97658 ns BAR4 Disabled
# INFO: 97658 ns BAR5 Disabled
# INFO: 97658 ns ExpROM Disabled
# INFO: 98794 ns Completed configuration of Endpoint BARs.
# INFO: 98794 ns TASK:my_test Setup
# INFO: 98794 ns TASK:my_test Write to 32bit register at 0x000000
# with wdata=0xBABEFACE
# INFO: 98802 ns TASK:my_test 1.12 Read from 32bit register
# at addr = 0x00000000
# INFO: 9490 ns TASK:my_test 1.13 Register compare matches!
# INFO: 115370 ns TASK:my_test 2.21 Memory Read burst
# SUCCESS: Simulation stopped due to successful completion!
# Break in Function ebfm_log_stop_sim at
# ./..//top_tb/simulation/submodules//altpcietb_bfm_log.v
# line 78
UG-01097_avst
2014.08.18
Partial Transcript for Configuration Space Bypass Simulation 3-13
Getting Started with the Configuration Space Bypass Mode Qsys Example Design Altera Corporation
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