Motorola DSP96002 - Manual (Page 123)

MOTOROLA DSP96002 USER’S MANUAL 7 - 37
7.4.21.1 Semaphore Control
Whenever a host transfer is to be executed, the host processor must first obtain ownership of the slave’s
HI. This is done by semaphore control. The following is an example of code used by the host processor to
obtain ownership of the HI. The LSB bit of the SEM register is used as a semaphore bit:
clock
words cycles
SEMA BSET #0,Y:SEMR 1 4
JCS SEMA 1 4
start host activity
.
.
.
end of host activity
BCLR #0,Y:SEMR 1 4
The BSET instruction tests the semaphore bit and then sets the bit before releasing the bus. If (1) the bit
was already set when tested, the slave is being used by another master and this master enters a loop wait-
ing for the other master to finish and clear the semaphore bit. If (2) the bit was zero when tested, the slave
was available and the master can continue to access the slave. Setting the bit with the BSET instruction
signals other masters that the slave is now unavailable. After completing the host activity, the current master
clears the semaphore bit to allow other masters to access this slave. The minimal overhead for one host
transfer is 3 program words and 12 clock cycles. This procedure is not necessary when there can be only
one bus master.
7.4.21.2 Host Command Register Read
In this example, both master and slave are DSP96002s. HCVR points to the address of the selected slave
CVR register (
—
H
–
S=0,
—
H
–
A=1, A5-A2=1101). The master executes the following instruction:
MOVE Y:HCVR,R0
7.4.21.3 Host Command Register Write
In this example, both master and slave are DSP96002s. HCVR points to the slave CVR register (
—
H
–
S=0,
—
H
–
A=1, A5-A2=1101). It is recommended to verify, before initiating the Host Command, that the previous
host command has been executed (HC bit is cleared). The master executes the following instructions:
HCMD BRSET 15,Y:HCVR,HCMD ;testing of HC
MOVE R0,Y:HCVR