Trapcc conditional software interrupt trapcc – Motorola DSP96002 User Manual

Page 496

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DSP96002 USER’S MANUAL

MOTOROLA

TRAPcc

Conditional Software Interrupt

TRAPcc

Operation:

If cc, then

begin software exception processing.

Assembler Syntax:

TRAPcc

Description:

If the specified integer condition is true, normal instruction execution is suspended and software exception

processing is initiated. The interrupt priority level (I1,I0) is set to 3 in the status register if a long interrupt

service routine is used. If the specified condition is false, continue with the next instruction. See Section

A.10 for restrictions.

"cc" may specify the following conditions:

Mnemonic

Condition

CC (HS) - carry clear (higher or same)

C = 0

CS (LO) - carry set (lower)

C = 1

EQ

- equal

Z = 1

GE

- greater or equal

N && V = 0

GT

- greater than

Z v (N && V) = 0

HI

- higher

Z v C = 0

LE

- less or equal

Z v (N && V) = 1

LS

- lower or same

Z v C = 1

LT

- less than

N && V = 1

MI

- minus

N = 1

NE(Q)

- not equal

Z = 0

PL

- plus

N = 0

VC

- overflow clear

V = 0

VS

- overflow set

V = 1

AL

- always true

n.a.

CCR Condition Codes: Not affected.

ER Status Bits: Not affected.

IER Flags: Not affected.

Instruction Format: TRAPcc

1c

cccc

0000

0011

31

14 13

0

0000

0000

0000

0000

00

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