Motorola DSP96002 - Manual (Page 813)

MOTOROLA 31
The DSP96002 views each timer as a memory-mapped peripheral occupying two 32-bit
words in the X data memory space, and may use each timer as a normal memory-mapped
peripheral by using standard polled or interrupt programming techniques.The program-
ming model is shown in Figure 5.
6.2 TIMER CONTROL/STATUS REGISTER (TCSR)
The 32-bit read/write TCSR controls the timer and verifies its status. The TCSR can be
accessed by normal move instructions and by bit manipulation instructions. The control
and status bits are described in the following paragraphs.
6.2.1 Timer Enable (TE) Bit 31
The TE bit enables or disables the timer. Setting the TE bit (TE=1) will enable the timer,
and the counter will be loaded with the value contained in the TCR and will start decre-
menting at each incoming event. Clearing the TE bit will disable the timer. Hardware
RESET and software RESET (RESET instruction) clear TE.
6.2.2 Timer Interrupt Enable (TIE) Bit 30
The TIE bit enables the timer interrupts after the counter reaches zero and a new event
occurs. If TCR is loaded with n, an interrupt will occur after (n+1) events.
Setting TIE (TIE=1) will enable the interrupts.When the bit is cleared (TIE=0) the interrupts
are disabled. Hardware and software resets clear TIE.
6.2.3 Inverter (INV) Bit 29
The INV bit affects the polarity of the external signal coming in on the TIO input and the
polarity of the output pulse generated on the TIO output.
If TIO is programmed as an input and INV=0, the 0-to-1 transitions on the TIO input pin
will decrement the counter. If INV=1, the 1-to-0 transitions on the TIO input pin will decre-
ment the counter.
If TIO is programmed as output and INV=1, the pulse generated by the timer will be in-
verted before it goes to the TIO output pin. If INV=0, the pulse is unaffected.
In Timer Mode 4 (see Section 6.4.4 - Timer Mode 4 (Pulse Width Measurement Mode)),
the INV bit determines whether the high pulse or the low pulse is measured to determine
input pulse width. In Timer Mode 5 (see Section 6.4.5 - Timer Mode 5 (Period Measure-
ment Mode)), the INV bit determines whether the period is measured between leading or
trailing edges.
In GPIO mode, the INV bit determines whether the data read from or written to the TIO
pin shall be inverted (INV=1) or not (INV=0).
INV is cleared by hardware and software resets.