Motorola DSP96002 User Manual
Page 187
MOTOROLA
DSP96002 USER’S MANUAL
10 - 21
(ODEC releases the chip from the "halt" state and the instruction is executed again (in a "RE-
PEAT-like" fashion. The signal that marks the end of the instruction returns the chip to the
"halt" state and an acknowledge is issued to the command controller.)
24.
ACK
25.
Send command READ GDB REGISTER
(ODEC selects GDB as source for serial data and an acknowledge is issued to the command
controller.)
26.
ACK
27.
CLK
28.
Repeat from step 23 until the entire memory area is examined. At the end of the process R0
has to be restored.
10.12.4
Returning from Debug Mode to Normal Mode
There are two cases for returning from the debug mode. Either control will be returned to the program that
was running before debug was initiated or the registers will be changed to jump to a different program.
10.12.4.1
Case 1: Return to the previous program (Return to normal mode).
1.
Send command WRITE PDB REGISTER (no GO, no EX).
(ODEC selects the PDB as the destination for serial data – also, ODEC selects the on-chip
PAB register as the source for the PAB bus. After the PAB was driven, an acknowledge is is-
sued to the command controller.)
2.
ACK
3.
Send the 32 bits of the saved PIL (instruction latch) value.
(After all the 32-bits have been received the PDB register drives the PDB. ODEC causes the
core to load the opcode. An acknowledge is issued to the command controller.)
4.
ACK
5.
Send command WRITE PDB REGISTER (GO, EX).
(ODEC selects PDB as destination for serial data.)
6.
ACK
7.
Send the 32-bit of the saved PDB value.
(After 32 bits have been received, the PDB register drives the PDB. ODEC releases the chip
from the "halt" state and the Debug Mode bit in OSCR is cleared. The chip continues to ex-
ecute instructions until a Debug Mode condition occurs.)
10.12.4.2
Case 2: Jump to a new program (Go from address $xxxxxxxx).
1.
Send command WRITE PDB REGISTER (no GO, no EX).
(ODEC selects PDB as destination for serial data.)
2.
ACK
3.
Send 32 bits of the opcode of a two word jump instruction ($030c3f80) instead of the saved
PIL (instruction latch) value.
(After all the 32-bits have been received the PDB register drives the PDB. ODEC causes the
core to load the opcode. An acknowledge is issued to the command controller.)