Motorola DSP96002 User Manual
Page 752
MOTOROLA
DSP96002 USER’S MANUAL
C-29
tination register.
2.
Multiplier: The multiplier in the multiply unit described in paragraph C.1.5.2 also performs the
integer multiplications. It accepts two 32-bit operands in the low portion of the data ALU source
registers, and delivers a 64-bit result in the low and middle portions of the destination register.
Both signed and unsigned multiplications are supported.
3.
Logic Unit: The logic unit is responsible for the logical operations AND, ANDC, OR, ORC,
EOR, NOT, ROR. In addition, it performs the bit field manipulation instructions SPLIT, SPLITB,
JOIN, JOINB, EXT, and EXTB. The logic unit operates on 32-bit operands located in the low
portions of the data ALU registers. Results are also stored in the low portion of the destination.
4.
Barrel Shifter: The barrel shifter in the normalization unit used for mantissa alignment in float-
ing point additions is also available for performing multibit shifts on integer (fixed-point) data.
Both single and multibit arithmetic shifts left and right and logical shifts left and right are sup-
ported.