Motorola DSP96002 - Manual (Page 278)

A - 90 DSP96002 USER’S MANUAL MOTOROLA
FADD.S Floating-Point Add FADD.S
Operation:
D + S
→
ROUND(SP)
→
D
(parallel data bus move)
Assembler Syntax:
FADD.S S,D (move syntax - see the MOVE instruc-
tion description.)
Description:
Add the two specified operands, round to single precision and store the result in the destination operand D.
Input Operand(s) Precision: SEP Floating-Point.
Output Operand Precision: SP Floating-Point.
CCR Condition Codes:
C - Not affected.
V - Not affected.
Z - Set if result is zero. Cleared otherwise.
N - Set if result is negative. Cleared otherwise.
I - Set if result is infinity. Cleared otherwise.
LR - Not affected.
–
R - Not affected.
A - Not affected.
ER Status Bits:
INX -Set if result is inexact. Cleared otherwise.
DZ -Always cleared.
UNF -Set if result underflows. Cleared otherwise.
OVF -Set if result overflows. Cleared otherwise.
OPERR-Set if operands are opposite-signed infinities. Cleared otherwise.
SNAN -Set if operand is a signaling NaN. Cleared otherwise.
NAN -Set if result is a NaN. Cleared otherwise.
UNCC -Always cleared.
IER Flags: Flags changed according to standard definition.
Instruction Format: FADD.S S,D (move syntax - see the MOVE instruction description.)