Data organization and addressing modes – Motorola DSP96002 User Manual

Page 54

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MOTOROLA

DSP96002 USER’S MANUAL

5 - 1

SECTION 5

DATA ORGANIZATION AND ADDRESSING MODES

5.1

OPERAND SIZES

Operand sizes are defined as follows: a byte is 8 bits long, a short word is 16 bits long, a word is 32 bits

long and a long word is 64 bits long. For floating-point operations the operand sizes are defined as follows:

a single real is 32 bits long, a double real is 64 bits long and a register operand is 96 bits long. The operand

size for each instruction is either explicitly encoded in the instruction or implicitly defined by the instruction

operation.

5.2

DATA ORGANIZATION IN MEMORY

Program memory is 32 bits wide and supports 32-bit instruction words and instruction extension words.

The X and Y data memories are each 32 bits wide and support word and single real operands. The X and

Y memories may be referenced as a single 64-bit wide memory space (the "L" space) to support long word

and double real operands.

5.2.1 Integer Memory Data Formats

The DSP96002 supports four integer memory data formats:

Signed Word Integer - 32 bits wide with two’s complement representation.

Signed Long Word Integer - 64 bits wide with two’s complement representation.

Unsigned Word Integer - 32 bits wide with unsigned magnitude representation.

Unsigned Long Word Integer - 64 bits wide with unsigned magnitude representation.

The bit weighting for signed integers is presented in Figure 5-1. The bit weighting for unsigned integers is
presented in Figure 5-2.

The DSP96002 does not support direct operations on Long Word Integers but they can be produced as

result of some ALU operations or as a result of a Long Move.

5.2.2 Floating-point Memory Data Formats

The DSP96002 supports two floating-point memory data formats: Single Precision (32 bits) and Double

Precision (64 bits), both fully complying with the IEEE Standard 754 for Binary Floating-Point Arithmetic.

The memory formats for floating-point operands supported by DSP96002 are shown in Figure 5-3. The

memory format for single and double real operands which conform to the IEEE 754 standard are shown

below. Note that the stored exponent (e) is unsigned (i. e., biased positive) and positioned in the significant

bits above those for the mantissa. By doing this, data can be ordered (sorted) by an integer machine which

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