Motorola DSP96002 - Manual (Page 199)

MOTOROLA DSP96002 USER’S MANUAL A - 11
need for the UNCC bit. This would be true except for the way in which the 754-standard treats
the equal and "not equal" predicates. From the condition code tables associated with the float-
ing-point conditional instructions, it can be seen that the UNCC bit will not be set if one or both
of the operands is a NaN. This is because the 754-standard recognizes that operands do not
have to be ordered to be tested for equality (i. e., UNCC will not be affected when executing
FBEQ or FBNE). That is, the same branch should be taken in a programming environment which
was aware of the IEEE binary floating-point number system as in one which was not aware.
This is not the case for inequality predicates.
In summary, conditional predicates whose outcome may depend upon "NaN awareness" by the
original author of the program are those involving inequalities. The UNCC bit has been provided
on the DSP96002 to aid in porting programs written in an IEEE non-aware environment to the
DSP96002 (IEEE aware environment). FBERR instructions which branch on UNCC set can be
inserted in branches which could have been incorrectly taken due to NaN operands being in-
volved in the FCMP. When executing programs whose author was "NaN aware", the UNCC bit
can be ignored. When executing programs whose author was "NaN unaware", the UNCC bits
status should be tested since the original author’s intentions are unclear.
Figure A-5 details how each floating-point instruction affects the ER register bits.