Motorola DSP96002 - Manual (Page 419)

MOTOROLA DSP96002 USER’S MANUAL A - 231
X: R X Memory and Register Move X: R
Operation:
X:<ea>
→
D1 S2
→
D2
S1
→
X:<ea> S2
→
D2
#xxxx
→
D1 S2
→
D2
Assembler Syntax:
X: ea, D1 S2,D2
S1,X: ea S2,D2
#Data,D1 S2,D2
Description:
Move one word operand to/from X memory and one word operand from register to register. One effective
address is specified. A memory to register or register to memory direction may be specified in the effective
address.
When two parallel data move operations are specified in the same instruction, certain restrictions apply. If
the instruction has an integer opcode, both data moves must be integer moves and specify integer oper-
ands. If the instruction has a floating-point opcode, both data moves must be floating-point moves and
specify floating-point operands.
If the opcode-operand portion of the instruction specifies as the destination a portion of the register Dn, the
same register portion may not be specified as a destination D in the data bus move operation. That is, du-
plicate destinations are not allowed in the same instruction. For example, both a Data ALU operation and
a data move operation cannot write into the same register in the same instruction.
If the opcode-operand portion of the instruction specifies as the source or destination a portion of the reg-
ister Dn, the same register portion may be specified as a source S in the data bus move operation. That is,
duplicate sources are allowed in the same instruction. For example, a data move operation can read the
same register which is being used as a source or destination by a Data ALU operation in the same instruc-
tion.
010d WdYY YXXX MMMR uu uuuu uuuu uuuu
31 14 13 0
OPTIONAL EFFECTIVE ADDRESS EXTENSION OR IMMEDIATE LONG DATA
Instruction Format - Opcode-operands : X: ea, D1S2,D2
S1,X: ea S2,D2
#Data,D1S2,D2
Move Move