Plcć5 logical addressing – Rockwell Automation 1770, D17706.5.16 Ref Mnl DF1 Protocol Command User Manual

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13–10

PLC Addressing

Publication 1770Ć6.5.16 - October 1996

PLCĆ5 Logical Addressing

PLC-5 processors, like PLC-3 processors, use a form of logical
addressing. With logical addressing, you specify the address for
each level (or sub-division) of PLC-5 memory, down to the smallest
subdivision you want to access:

With this processor

You can specify up to

PLCĆ5

4 levels of extended addressing, which is enough to address

any word in PLCĆ5 memory.

PLCĆ5/250

7 levels of extended addressing, which is enough to address

any word in PLCĆ5/250 memory.

To send a command message to a PLC-5 node, you put the extended
address of the node in the field labelled PLC-5 SYSTEM ADDRESS
in the message block formats of your program. (See Chapter 7,
“Communication Commands.”) There are two types of PLC-5
logical addressing:

Logical Addressing

Type

Processors Description

Page

logical binary
addressing

PLCĆ5

A series of bytes used to encode up

to 4 levels of an address.

13-11

addressing

PLCĆ5/250

A series of bytes used to encode up

to 7 levels of an address.

13-13

logical ASCII

addressing

PLCĆ5 and

PLCĆ5/250

UserĆspecified address in the same

form that you use at the programming

node.

This addressing lets any device

communicate with any other device,

without knowing the internal memory

structure of the target device.

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