Rockwell Automation 1769-HSC Compact High Speed Counter Module User Manual
Page 83
Rockwell Automation Publication 1769-UM006E-EN-P - July 2013
83
Module Configuration, Output, and Input Data
Chapter 4
Storage Mode (Ctr
n
Config.StorageMode_0 through
Ctr
n
Config.StorageMode_2)
These three bits apply to Counters 0 and 1 only. They define how the module
interprets the Z input, as shown below. Each bit works independently. If bit 0 and
bit 2 are set simultaneously, a Z event causes the Current Count Value to be
stored and then preset.
Linear (Ctr0Config.Linear through Ctr3Config.Linear)
This bit indicates how the counter operates upon reaching a Ctr
nMinCount or
Ctr
nMaxCount.
• 0 = Ring Counter
• 1 = Linear Counter
See
for a description of ring and linear counter operation.
Set bit
For function
CtrnConfig.StorageMode_0
Stores the Current Count Value on the rising edge of Z to
Ctr[n].StoredCount in the input file.
CtrnConfig.StorageMode_1
Holds the counter at its Current Count Value while Z = 1.
CtrnConfig.StorageMode_2
Presets the Current Count Value on the rising edge of Z.
IMPORTANT
Z = internal Z. Internal Z is the version of the Z input pin as modified by
the output array control bits Z Invert and Z Inhibit.
TIP
The Ctr1Config.Storage Mode bits are reserved if NumberofCounters_1
and NumberofCounters_0 are set to 00 (one counter). Attempting to set
reserved bits will result in a configuration error.
IMPORTANT
Do not change this value while the counter is enabled. Attempting to do
so will result in a BadModConfigUpdate error. See
for a list
of prohibited settings.
IMPORTANT
Do not change this value while the counter is enabled. Attempting to do
so will result in a BadModConfigUpdate error. See
for a list of
prohibited settings.