Rockwell Automation 5370 Color CVIM Communications Manual - Manual (Page 30)

Chapter 3
Using Local I/O
3–10
In Figure 3.5, trigger pulse #2 occurs before the Color CVIM system is
finished processing the inspection cycle started by trigger pulse #1. This
causes the Trigger NAK signal to go high. Trigger NAK will stay high until
leading edge of the next valid trigger pulse (trigger pulse #3).
Figure 3.5
Timing Diagram– Missed Trigger
See NOTE 1 below
MODULE
BUSY
* **
Trigger
pulse #1
Trigger
pulse #3
Trigger
(Input)
TRIGGER
NAK
DATA
VALID
Trigger
pulse #2
STROBE
*Min. processing time:
17ms, 256x256 Res.
17ms, 512x256 Res.
34ms, 512x512 Res.
**Analysis time.
TRIGGER NAK goes high because
trigger 2 cannot be processed. (Trig-
ger 1 processing is not yet complete.)
See NOTE 2 below
TRIGGER NAK goes low
because trigger 3 can be
processed. (Trigger 1
processing is now com-
plete.)
NOTE 1: If Trigger 2 occurs within
5ms of Trigger 1, it is assumed to be
trigger “bounce” and is ignored. NOTE 2: In delayed trigger reject (DTR)
mode, the Trigger NAK signal can occur up
to
≈ 15ms after the rising edge of Trigger 2.
Using Output Signal
Timing Data (cont’d)