Section 14 – pwm, 1 – detailed description, 1 – pwmcn and pwmdata sfrs – Maxim Integrated DS4830A Optical Microcontroller User Manual

Page 124

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DS4830A User’s Guide

124

SECTION 14 – PWM

The DS4830A provides 10 independent PWM output pins that can be used to create DC-DC power supply
controllers or a Thermoelectric Cooler Controller (TECC)

Refer to Application Note 5424:

Thermoelectric Cooler Control Using the DS4830 Optical Microcontroller

.

14.1 – Detailed Description

The DS4830A provides 10 independently configurable PWM outputs. The DS4830A PWM controller has 3 SFRs
PWMCN, PWMDATA and PWMSYNC for configuration and control of the 10 PWM outputs.

Using PWMCN and

PWMDATA, individual PWM channels can be programmed for unique duty cycles (DCYCn), configurations (PWMCFGn),
and delays (PWMDLYn), where n represents the PWM channel number. The DS4830A provides three types of driving
strength PWM outputs. Refer to the DS4830A IC data sheet for more information.


The PWM block has three SFRs that are accessed in module 5 (PWMCN, PWMDATA and PWMSYNC). All aspects
of the PWM block can be programmed using these 3 SFRs.

14.1.1 – PWMCN and PWMDATA SFRs
The PWM Control SFR (PWMCN) along with the PWM Data SFR (PWMDATA) is used to configure and control
individual PWM channels. All the channels can be independently configured. Figure 14-1 illustrates how this is
accomplished.

The PWMCN SFR has 4 bits (PWM_SEL) that select a particular PWM channel to be configured (See PWM Register
Descriptions for details). 2 bits (REG_SEL) within the PWMCN SFR allows for programming of 3 local registers for
each PWM Channel:

• Duty Cycle (Register DCYCn),

• Configuration (Register PWMCFGn)

• Delay (Register PWMDLYn).


The PWMDATA SFR writes data to the particular local register pointed to by the PWM_SEL and REG_SEL bits as
illustrated in Figure 14-1. PWM_SEL auto increments after each read or write operation to PWMDATA register
allowing quick configuration.

The PWMCN SFR additionally allows enabling or disabling individual PWM Channels independently as well as
update of the Duty Cycle programmed in the DCYCn local register. Table 14-1 explains how the different Local
Registers are selected, and is discussed further in the Individual PWM detailed description section.

Table 14-1: Selecting the Local Registers

REG_SEL

LOCAL REGISTER SELECTED

00b

Duty Cycle Register (DCYCn)

01b

PWM Configuration Register (PWMCFGn)

1xb

Delay Setting Register (PWMDLYn)

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