Maxim Integrated DS4830A Optical Microcontroller - Manual (Page 134)

DS4830A User’s Guide
134
14.3.2 – PWM Data Register (PWMDATA)
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name PWMDATA[15:0]
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
BIT
NAME DESCRIPTION
15:0 PWMDATA[15:0] PWM Data. The PWM Data Register is used for configurations for various PWM
channels. It is used to read or write various PWM local registers which are pointed by
combinations of REG_SEL[1:0] and PWM_SEL[3:0] bits in the PWMCN register.
The PWMDATA Register is used to configure the local registers for each PWM channel. PWM channel is selected by
PWM_SEL[3:0] bits in the PWMCN register. Individual local registers for a channel are selected by REG_SEL[1:0]
bits in the PWMCN register. See below for the local register configurations.
14.3.2.1 – Local Register DCYCn
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Name PWMDATA[15:0]
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
PWMCN REG_SEL = 00b
PWMDATA[15:0]  DCYCn[15:0]
BIT NAME DESCRIPTION
15:0 DCYCn[15:0] Duty Cycle Register. When REG_SEL[1:0] in the PWMCN SFR is set to 00b, the
PWMDATA register points to the Duty Cycle Register of the PWM channel selected by
PWM_SEL[3:0] bits in the PWMCN register.
The number of bits used to program the Duty Cycle depends on the resolution
programmed in the PWMCFG register. For 16 bits of resolution, the Duty cycle the
complete 16 bits of the PWMDATA register. However if only 7 bits of resolution is
selected, only the lower 7 bits are used.
Example: If PWM_SEL[3:0] = 0101b and REG_SEL[1:0] = 00b, then the PWMDATA
register points to the Duty Cycle Register of the PWM Channel 5. A read or write to/from
PWMDATA register will read or write from the Duty Cycle Register of PWM Channel 5. If
the resolution of channel 5 is set to 9 bits, only DCYCn[8:0] will be used for programming
the Duty Cycle.