Maxim Integrated DS4830A Optical Microcontroller - Manual (Page 16)

DS4830A User’s Guide
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2.3.4 – Stack Memory
A 16-bit, 32-level on-chip stack provides storage for program return addresses and temporary storage of system registers.
The stack is used automatically by the processor when the CALL, RET, and RETI instructions are executed, and when an
interrupt is serviced. The stack can also be used explicitly to store and retrieve data by using the @SP- - source, @++SP
destination, or the PUSH, POP, and POPI instructions. The POPI instruction acts identically to the POP instruction except
that it additionally clears the INS bit.
The width of the stack is 16 bits to accommodate the instruction pointer size. On reset, the stack pointer SP initializes to
the top of the stack (1Fh). The CALL, PUSH, and interrupt vectoring operations first increment SP and then store a value
at @SP. The RET, RETI, POP, and POPI operations first retrieve the value at @SP and then decrement SP.
The stack memory is initialized to indeterminate values upon reset or power-up. Stack memory is dedicated for stack
operations only and cannot be accessed by the DS4830A program or data busses.
When using the in-circuit debugging features, one word of the stack must be reserved for the debugging routines. If in-
circuit debug is not used, the entire stack is available for application use.
2.4 – Program and Data Memory Mapping and Access
The memory on the DS4830A is implemented using Harvard architecture, with separate busses for program and data
memory. The Memory Management Unit (MMU) allows the DS4830A to also support a pseudo-Von Neumann memory
map. The pseudo Von Neumann memory map allows each of the memory segments (flash, SRAM, and utility ROM) to
be logically mapped into a single contiguous memory map. This allows all of the memory segments to be accessed as
both program and memory data. The pseudo-Von Neumann memory map provides the following advantages:
• Program execution can occur from the flash, SRAM, or utility ROM memory segments.
• The SRAM and flash memory segments can both be used for data memory.
Using the pseudo-Von Neumann memory map does have one restriction. This restriction is that a particular memory
segment cannot be simultaneously accessed as both program and data memory.
2.4.1 – Program Memory Access
The instructions that the DS4830A is executing reside in what is defined as the program memory. The MMU fetches the
instructions using the program bus. The Instruction Pointer (IP) register designates the program memory address of the
next instruction to fetch. The Instruction Pointer is read/write accessible by the user software. A write to the Instruction
Pointer will force program flow to the new address on the next cycle following the write. The content of the Instruction
Pointer will be incremented by 1 automatically after each fetch operation. From an implementation perspective, system
interrupts and branching instructions simply change the contents of the Instruction Pointer and force the opcode to fetch
from a new program location.