DS4830A User’s Guide
7
18.4.1 – Accessing the Multiplier ................................................................................................................................. 149
18.5 – Hardware Multiplier Peripheral Registers ............................................................................................................. 151
18.6 – Hardware Multiplier Examples .............................................................................................................................. 155
SECTION 19 – WATCHDOG TIMER ................................................................................................................................. 156
19.1 - Overview ............................................................................................................................................................... 156
19.2 – Watchdog Timer Description ................................................................................................................................ 156
19.2.1 – Watchdog Timer Interrupt Operation ............................................................................................................. 157
19.2.2 – Watchdog Timer Reset Operation ................................................................................................................. 157
19.2.3 – Watchdog Timer Applications ........................................................................................................................ 157
SECTION 20 – TEST ACCESS PORT (TAP) ..................................................................................................................... 159
20.1 – TAP Controller ...................................................................................................................................................... 160
20.2 – TAP State Control ................................................................................................................................................. 161
20.2.1 – Test-Logic-Reset ............................................................................................................................................ 161
20.2.2 – Run-Test-Idle ................................................................................................................................................. 161
20.2.3 – IR-Scan Sequence ......................................................................................................................................... 161
20.2.4 – DR-Scan Sequence ....................................................................................................................................... 162
20.3 – Communication via TAP ....................................................................................................................................... 162
20.3.1 – TAP Communication Examples – IR-Scan and DR-Scan ............................................................................. 163
SECTION 21 – IN-CIRCUIT DEBUG MODE ...................................................................................................................... 165
21.1 – Background Mode Operation ............................................................................................................................... 166
21.1.1 – Breakpoint Registers ..................................................................................................................................... 167
21.1.2 – Using Breakpoints .......................................................................................................................................... 169
21.2 – Debug Mode ......................................................................................................................................................... 170
21.2.1 – Debug Mode Commands ............................................................................................................................... 170
21.2.2 – Read Register Map Command Host-ROM Interaction .................................................................................. 172
21.2.3 – Single Step Operation (Trace) ....................................................................................................................... 173
21.2.4 – Return ............................................................................................................................................................ 174
21.2.5 – Debug Mode Special Considerations ............................................................................................................ 174
21.3 – In-Circuit Debug Peripheral Registers .................................................................................................................. 175
SECTION 22 – IN-SYSTEM PROGRAMMING .................................................................................................................. 179
22.1 – Detailed Description ............................................................................................................................................. 179
22.1.1 – Password Protection ...................................................................................................................................... 180
22.1.2 – Entering JTAG Bootloader ............................................................................................................................. 180
22.1.3 – Entering I
2
C Bootloader ................................................................................................................................. 181
22.1.4 – I
C Bootloader Disable ................................................................................................................................... 181
22.2 – Bootloader Operation ........................................................................................................................................... 182
22.2.1 – JTAG Bootloader Protocol ............................................................................................................................. 182
22.2.2 – I
C Bootloader Protocol ................................................................................................................................. 183
22.3 – Bootloader Commands ......................................................................................................................................... 184
22.3.1 – Command 00h – No Operation ...................................................................................................................... 184
22.3.2 – Command 01h – Exit Loader ......................................................................................................................... 184
22.3.3 – Command 02h – Master Erase ...................................................................................................................... 184
