Maxim Integrated DS4830A Optical Microcontroller - Manual (Page 201)

DS4830A User’s Guide
201
Since the stack is 16 bits wide, it is possible to store two 8-bit register values on it in a single location. This allows
more efficient use of the stack if it is being used to save and restore registers at the start and end of a subroutine.
SubOne:
move PFX[0], IC
push PSF ; store IC:PSF on the stack
...
pop GR ; 16-bit register
move IC, GRH ; IC was stored as high byte
move PSF, GRL ; PSF was stored as low byte
ret
23.10 – Accessing Data Memory
Data memory is accessed through the data pointer registers DP[0] and DP[1] or the Frame Pointer BP[Offs]. Once
one of these registers is set to a location in data memory, that location can be read or written as follows, using the
mnemonic @DP[0], @DP[1] or @BP[OFFS] as a source or destination.
move DP[0], #0000h ; set pointer to location 0000h
move A[0], @DP[0] ; read from data memory
move @DP[0], #55h ; write to data memory
Either of the data pointers may be post-incremented or post-decremented following any read or may be pre-
incremented or pre-decremented before any write access by using the following syntax.
move A[0], @DP[0]++ ; increment DP[0] after read
move @++DP[0], A[1] ; increment DP[0] before write
move A[5], @DP[1]-- ; decrement DP[1] after read
move @--DP[1], #00h ; decrement DP[1] before write
The Frame Pointer (BP[OFFS]) is actually comprised of a base pointer (BP) and an offset from the base pointer
(OFFS). For the frame pointer, the offset register (OFFS) is the target of any increment or decrement operation. The
base pointer (BP) is unaffected by increment and decrement operations on the Frame Pointer. Similar to DP[n], the
OFFS register may be pre-incremented/decremented when writing to data memory and may be post-
incremented/decremented when reading from data memory.
move A[0], @BP[OFFS--] ; decrement OFFS after read
move @BP[++OFFS], A[1] ; increment OFFS before write
All three data pointers support both byte and word access to data memory. Each data pointer has its own word/byte
select (WBSn) special function register bit to control the access mode associated with the data pointer. These three
register bits (WBS2 which controls BP[Offs] access, WBS1 which controls DP[1] access and WBS0 which control
DP[0] access) reside in the Data Pointer Control (DPC) register. When a given WBSn control bit is configured to 1,
the associated pointer is operated in the word access mode. When the WBSn bit is configured to 0, the pointer is
operated in the byte access mode. Word access mode allows addressing of 64k words of memory while byte access
mode allows addressing of 64k bytes of memory.
Each data pointer (DP[n]) and Frame Pointer base, BP register) is actually implemented internally as a 17-bit register
(e.g. 16:0). The Frame Pointer offset register (OFFS) is implemented internally as a 9-bit register (e.g.8:0). The
WBSn bit for the respective pointer controls whether the highest 16 bits (16:1) of the pointer are in use, as is the
case for word mode (WBSn = 1) or whether the lowest 16 bits (15:0) are in use, as will be the case for byte mode
(WBSn = 0). The WBS2 bit also controls whether the high 8 bits (8:1) of the offset register are in use (WBS2 = 1) or
the low 8 bits (7:0) are used (WBS2 = 0). All data pointer register reads, writes, auto-increment/decrement
operations occur with respect to the current WBSn selection. Data pointer increment and decrement operations only
affect those bits specific to the current word or byte addressing mode (e.g., incrementing a byte mode data pointer
from FFFFh does not carry into the internal high order bit that is utilized only for word mode data pointer access).
Switching from byte to word access mode or vice versa does not alter the data pointer contents. Therefore, it is
important to maintain the consistency of data pointer address value within the given access mode.
move WBS0, #0 ; DP[0] in byte mode
move DP[0], #1 ; DP[0]=0001h (byte mode, index 1)
move WBS0, #1 ; DP[0] in word mode, byte mode lsbit not visible
move DP[0], #1 ; DP[0]=0001h (word mode, index 1)
move WBS0, #0 ; DP[0] in byte mode
move GR, DP[0] ; GR = 0003h (word index 1, byte index 1)
The three pointers share a single read/write port on the data memory and thus, the user must knowingly activate a
desired pointer before using it for data memory read operations. This can be done explicitly using the data pointer