Maxim Integrated DS4830A Optical Microcontroller - Manual (Page 144)

DS4830A User’s Guide
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interrupt if enabled. When the match occurs, the timer reloads the GTV register with 0x0000 at the next timer clock.
In compare mode, the GTC register should be written first before setting the GTR bit.
16.1.2 – Clock Selection
There are three timer clock sources available in each timer module, core clock, peripheral clock and external clock.
The peripheral clock is twice the core clock. The external clock can be between 20MHz to 133MHz. The timer clock
source can be selected using CLK_SEL [1:0] bits in the GTCN register.
16.1.3 – Timer Clock Prescaler
Each timer has 6 different prescalers. The prescaler is selected by appropriately setting the GTPS [2:0] bits in the
GTCN register. The prescaler divides the selected input clock by a value from 1 to 1024.