Maxim Integrated DS4830A Optical Microcontroller - Manual (Page 5)

DS4830A User’s Guide
5
10.1.7 – Transmitting a Slave Address .......................................................................................................................... 85
10.1.8 – Transmitting Data ............................................................................................................................................. 85
10.1.9 – Receiving Data ................................................................................................................................................. 87
10.1.10 – I
2
C Master Clock Stretching ........................................................................................................................... 88
10.1.11 – Resetting the I
2
C Master Controller ............................................................................................................... 88
10.1.12 – Alternate Location .......................................................................................................................................... 89
10.1.13 – Operation as a Slave ..................................................................................................................................... 89
10.1.14 – GPIO .............................................................................................................................................................. 89
10.2 – I
2
C Master Controller Register Description ............................................................................................................ 90
SECTION 11 – I
2
C-COMPATIBLE SLAVE INTERFACE ...................................................................................................... 94
11.1 – Detailed Description ............................................................................................................................................... 95
11.1.1 – Default Operation ............................................................................................................................................. 95
11.1.2 – Slave Addresses .............................................................................................................................................. 95
11.1.3 – I
2
C START Detection ....................................................................................................................................... 95
11.1.4 – I 2 C STOP Detection ......................................................................................................................................... 95
11.1.5 – Slave Address Matching .................................................................................................................................. 95
11.1.6 – Advanced Mode Operation RX FIFO and TX Pages ....................................................................................... 97
11.1.7 – Transmitting Data ............................................................................................................................................. 98
11.1.8 – Receiving Data ............................................................................................................................................... 100
11.1.9 – Clock Stretching ............................................................................................................................................. 100
11.1.10 – SMBus Timeout ........................................................................................................................................... 102
11.1.11 – Resetting the I 2 C Slave Controller ............................................................................................................... 102
11.2 – I
2
C Slave Controller Register Description ............................................................................................................ 103
SECTION 12 – SERIAL PERIPHERAL INTERFACE (SPI) ................................................................................................ 111
12.1 – Serial Peripheral Interface (SPI) Detailed Description ......................................................................................... 111
12.1.1 – SPI Transfer Formats ........................................................................................................................................ 111
12.1.2 – SPI Character Lengths ...................................................................................................................................... 113
12.2 – SPI System Errors ................................................................................................................................................ 113
12.2.1 – Mode Fault ......................................................................................................................................................... 113
12.2.2 – Receive Overrun ................................................................................................................................................ 113
12.2.3 – Write Collision While Busy ................................................................................................................................ 114
12.3 – SPI Interrupts ........................................................................................................................................................ 114
12.4 – SPI Master ............................................................................................................................................................ 114
12.4.1 – SPI Transfer Baud Rates .................................................................................................................................. 114
12.4.2 – SPI Master Operation ........................................................................................................................................ 114
12.4.3 – SPI Master Register Descriptions ..................................................................................................................... 116
12.5 – SPI Slave .............................................................................................................................................................. 118
12.5.1 – SPI Slave Select ............................................................................................................................................ 118
12.5.2 – SPI Transfer Baud Rates ............................................................................................................................... 118
12.5.3 – SPI Slave Operation ...................................................................................................................................... 118
12.5.4 – SPI Slave Register Descriptions ....................................................................................................................... 119