Maxim Integrated DS4830A Optical Microcontroller - Manual (Page 55)

DS4830A User’s Guide
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For example, if ADSTART = 0, ADEND = 6 and NUM_SMP = 3 with ADDAINV = 1, then ADDAI is set to ‘1’ after
every (NUM_SMP + 1) ADC conversions and every End of Sequence. In the given example, ADDAI is set after
4,7,8,12,14… ADC Samples. Interrupts after 4, 8 and 12 ADC Samples are because of (NUM_SMP+1)
configurations and interrupts after 7 and 14 are because of “End of Sequence”. Figure 7-6 demonstrates above ADC
example sequence.
If ADC averaging is used, each of the converstions for an average is counted as a sample for interrupts. For
example, if four samples are being averaged for each channel and interrupts are set to trigger every four
converstions, then an interrupt will occur after each channel completes its four samples.
SAMPLE0 SAMPLE1 SAMPLE2 SAMPLE3 SAMPLE4 SAMPLE5 SAMPLE6 SAMPLE0 ……...
ADDAI Set
After
(NUM_SMP + 1)
ADC Samples
ADDAI Set
After END of
Sequence
4 ADC Samples 4 ADC Samples
ADDAI Set
After
(NUM_SMP + 1)
ADC Samples
ADC
SAMPLES
ADDAI
Flag
Figure 7-6: ADC Interrupt Intervals with NUM_SMP
The ADDAI flag is cleared by software by writing a ‘0’, or it is automatically cleared when a new conversion
sequence is started by setting the ADCONV bit to a ‘1’.
Note: The ADC controller processes ADC, internal die temperature and sample and holds conversions according to
ADC frame sequence and sets the corresponding flags in the ADST1 flag. The user should process and clear an
interrupt flag when it is set before another flag in the ADST1 is set by the ADC controller.
7.1.12 – ADC Internal Offset
The DS4830A ADC controller allows for ADC internal offset measurement. The ADC controller does not have a
dedicated buffer for the internal offset so it can only be accessed with location override enabled. For measurement of
ADC internal offset, the ADC controller connects internal ground to the ADC input and performs an ADC conversion.
Using this feature, software can calibrate the ADC internal offset.
Refer to Application Note 5321:
Calibrating the ADC Internal Offset of the DS4830 Optical Microcontroller .
7.1.13 – DAC External Reference Pins (REFINA and REFINB) as ADC Channels
The DS4830A provides an option to measure the voltage applied to the DAC external reference pins REFINA and
REFINB without enabling any DACs. The ADC controller has RPCFG register to configure REFINA and REFINB as
analog pins. This allows flexibility to use the REFINA and REFINB pins as two additional analog input channels and
can also be used as DAC external reference.
7.1.14 – Fast Conversion Mode (ADST.ENABLE_2X)
The DS4830A ADC controller can be used in fast mode to reduce the sample conversion time. The Enable_2x bit in
ADST register has to be set to 1 to use the ADC in fast mode. In normal operating mode, the ADC reads two input
samples and outputs the average of the results of both the samples. In Fast conversion mode, the ADC reads only
one input sample and outputs the result as such. The ADC conversion time is reduced by half when operating in fast
mode.