Maxim Integrated DS4830A Optical Microcontroller - Manual (Page 187)

DS4830A User’s Guide
187
22.3.11 – Command 10h – Load Code
Byte 1 Byte 2 Byte 3 Byte 4 (Length)
Bytes
Byte
Length+5
Byte
Length+6
Command Data In Data In Data In Data In NOP Return
Input 10h Length AddressL AddressH Data to load 00h 00h
Output X X X X X X 3Eh
This command programs (Length) bytes of data into the program flash starting at byte address
(AddressH:AddressL). The bootloader writes one 16-bit word to flash at a time. The low bit of the address will always
be forced to zero because instructions in program flash are word aligned. If an odd number of bytes are input, the
final word written to the program flash will have its most significant byte set to 00h. Memory locations in flash that
have been previously loaded must be erased (Master Erase or Page Erase Command) before they can be loaded
with a new value. The DS4830A uses a little-endian memory architecture where the least significant byte of each
word is loaded first. For example, if you load bytes (11h, 22h, 33h, 44h) starting at address 0000h, the first two words
of program space will be written to 2211h, 4433h. This command is password protected.
The time required to write 1 word of data to flash is approximately 80µs. To guarantee correct programming, a
bootloading program will need to ensure that there is at least 100µs of time between when the bootloader receives
two words of data. The easiest way to do this is to limit the clock rate to 100kHz. The time to transmit one word of
data with a 100kHz clock exceeds 100µs, thus giving the previously transmitted word time to be programmed into
flash prior to processing the next word. If a faster clock rate is used, delays will need to be added to ensure that
words are not transmitting at rates faster than 100µs.
The JTAG bootloader also supports polling using the status bits as a method to determine when a word has
successfully been written into flash. When sending the first two bytes of program data to load, the status bits should
return as 11 to signify that the bootloader is valid. After sending the 2
nd
byte, the bootloader will begin writing this
first word to flash and will be busy. If a 3
rd
byte of data is written while the bootloader is busy programming the first
word, the status bits will return as 10, which is loader busy. Upon receiving a status of 10, the 3
rd
byte needs to be
sent again until the status bits return as 11, or loader valid. When this code is returned the 3
rd
byte has been
received and the 4 th byte can now be sent. If using the JTAG bootloader with a clock faster than 100kHz, this polling
method should be used for every byte that is transmit to the bootloader.
22.3.12 – Command 11h – Load Data
Byte 1 Byte 2 Byte 3 Byte 4 (Length)
Bytes
Byte
Length+5
Byte
Length+6
Command Data In Data In Data In Data In NOP Return
Input 11h Length AddressL AddressH Data to load 00h 00h
Output X X X X X X 3Eh
This command writes (Length) bytes of data into the data SRAM starting at byte address (AddressH:AddressL). The
DS4830A uses a little-endian memory architecture where the least significant byte of each word is loaded first. For
example, if you load bytes (11h, 22h, 33h, 44h) starting at address 0000h, the first two words of memory space will
be written to 2211h, 4433h. This command is password protected.
22.3.13 – Command 20h – Dump Code
Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 5 Byte 6 Length
Bytes
Byte
Length+7
Command Data In Data In Data In Data In Data In NOP Data Out Return
Input 20h 2 AddrL AddrH LengthL LengthH 00h 00h 00h
Output X X X X X X X Memory 3Eh
This command returns the contents of the program flash memory. The memory dump begins at byte address
AddrH:AddrL and will contain LengthH:LengthL bytes. This command is password protected.