Altera CPRI IP Core - Manual (Page 163)

December 2013 Altera Corporation CPRI MegaCore Function
User Guide
C. CPRI Autorate Negotiation Testbench
The CPRI IP core supports an autorate negotiation testbench. The testbench
implements the external logic described in
Appendix B, Implementing CPRI Link
Autorate Negotiation and demonstrates autorate negotiation between the 0.6144
Gbps and the 1.2288 Gbps CPRI line rates or between the 6.144 Gbps and the 9.8304
Gbps line rates, depending on the CPRI IP core variation.
1 The autorate negotiation testbench requires that you compile with two different data
rates, to generate the .mif files for two CPRI line rates, before you can simulate. This
chapter includes instructions to generate the required .mif files and simulate the
testbench.
The autorate negotiation testbench is available only for certain CPRI IP core
variations. To generate this testbench, you must turn on Enable auto-rate negotiation
and Include MAC block, but turn off Include HDLC block and set Number of
antenna-carrier interfaces
to the value of zero. Refer to Table C–3 on page C–5 .
The autorate negotiation testbench demonstrates the following CPRI IP core
functions:
■ Writing to the registers
■ Frame synchronization process
■ Autorate negotiation of CPRI line rate
Table C–1 lists the figures that show the autorate negotiation testbenches for the
various device families.
Table C–1. Figures Illustrating Autorate Negotiation Testbench for Different CPRI IP Core Variations
CPRI IP Core Description Figure
Stratix IV GX variation Figure C–1
Cyclone IV GX variation Figure C–2
Arria V, Cyclone V, or Stratix V variation Figure C–3
Arria V GT variation configured at CPRI line rate of 9.8 Gbps Figure C–4