Altera CPRI IP Core - Manual (Page 194)

E–16 Appendix E: Delay Measurement and Calibration
Single-Hop Delay Measurement
CPRI MegaCore Function December 2013 Altera Corporation
User Guide
Table E–7 shows the fixed latency through the transceiver in the transmit side of
the CPRI IP core. These values correspond to T_txv_TX in Figure E–1 on page E–2 .
Table E–7. Fixed Latency T_txv_TX Through Tx Transceiver
CPRI Line Rate
(Gbps)
Fixed Latency Through Transceiver in cpri_clkout Clock Cycles
CPRI IP Core Variations with Hard PCS
Soft PCS
Variations on
Arria V GT
Device (7)
Arria II GX
Device (1)
Cyclone IV G
X Device (1)
Arria II GZ or
Stratix IV GX
Device (1)
Arria V (GX
or GT (5) )
Device
Arria V GZ or
Stratix V
Device
Cyclone V,
Device
0.6144 1.85 (2) 1.85 (2) 1.85 (2) 2.050 2.075 1.547 —
1.2288
3.1 (3)
3.1 (3)
3.6 (4) 4.05
4.094
2.549
6.049 2.4576
3.072
4.9152 —
14.061 6.144 —
9.8304 — — — — (6) — ,
Notes to Table E–7 :
(1) Latency numbers for Arria II GX, Arria II GZ, Cyclone IV GX, and Stratix IV GX devices are accurate when the tx_bitslipboundaryselect
field of the CPRI_TX_BITSLIP register has the value of zero, For the appropriate full formula to calculate the value of T_txv_TX in other cases,
refer to Notes (2) , (3) , and (4) and where they are referenced in the table.
(2) In this case, T_txv_TX = (70 + (4 + tx_bitslipboundaryselect ))/40, where tx_bitslipboundaryselect is the value in this field in the
CPRI_TX_BITSLIP register.
(3) In this case, T_txv_TX = (120 + (4 + tx_bitslipboundaryselect ))/40, where tx_bitslipboundaryselect is the value in this field in the
CPRI_TX_BITSLIP register.
(4) In this case, T_txv_TX = (120 + (24 + tx_bitslipboundaryselect ))/40, where tx_bitslipboundaryselect is the value in this field in
the CPRI_TX_BITSLIP register.
(5) If you configure your CPRI IP core with the CPRI line rate of 9.8304 Gbps, and target an Arria V GT device, the IP core is configured with a soft
PCS. The soft PCS configuration does not change with autorate negotiation to a lower frequency. This column describes variations that are not
configured with a soft PCS.
(6) Arria V GX devices do not support a CPRI IP core line rate of 9.8304 Gbps. Arria V GT devices support a CPRI IP core line rate of 9.8304 Gbps
only in soft PCS variations.
(7) The values described in this column apply to all Arria V GT variations that are configured with a CPRI line rate of 9.8304 Gbps, even after
autorate negotiation to a lower frequency. These variations cannot auto-negotiate to a CPRI line rate of 0.6144 Gbps.