Altera CPRI IP Core - Manual (Page 62)

4–30 Chapter 4: Functional Description
Auxiliary Interface
CPRI MegaCore Function December 2013 Altera Corporation
User Guide
Figure 4–16 shows an example of the behavior of the MAP Tx signals in this
synchronization mode in the basic mapping mode ( map_mode = 2’b00).
In the internally-clocked mode the delay in the AxC interface block from each data
channel can be quantified, because this delay is determined solely by the value in the
CPRI_MAP_OFFSET_TX register.
Auxiliary Interface
The CPRI auxiliary interface enables multi-hop routing applications and provides
timing reference information for transmitted and received frames.
The auxiliary (AUX) interface allows you to connect CPRI IP core instances and other
system components together by supporting a direct connection to a user-defined
routing layer or custom mapping block. You implement this routing layer, which is
not defined in the CPRI V5.0 Specification, outside the CPRI IP core. The AUX
interface supports the transmission and reception of IQ data and timing information
between an RE slave and an RE master, allowing you to define a custom routing layer
that enables daisy-chain configurations of RE master and slave ports. Your custom
routing layer determines the IQ sample data to pass to other REs to support multi-hop
network configurations or to bypass the CPRI IP core MAP interface to implement
custom mapping algorithms outside the IP core.
Figure 4–16. MAP Transmitter Interface in the Internally-Clocked Mode
cpri_clkout
cpri_tx_hfn
cpri_tx_x
map0_tx_ready
map0_tx_valid
map0_tx_data[31:0]
map1_tx_ready
map1_tx_valid
map1_tx_data[31:0]
map2_tx_ready
map2_tx_valid
map2_tx_data[31:0]
3
33 4 5 6 7
A
A
A B C D E F G H
B
B C D E F G H
C D E F G H