Device family support, Example designs, Debug features – Altera Arria 10 Avalon-MM DMA User Manual
Page 11: Ip core verification, Device family support -7, Example designs -7, Debug features -7, Ip core verification -7
Device Family Support
Table 1-5: Device Family Support
Device Family
Support
Arria 10
Preliminary. The IP core is verified with prelimi‐
nary timing models for this device family. The IP
core meets all functional requirements, but might
still be undergoing timing analysis for the device
family. It can be used in production designs with
caution.
Other device families
Refer to the Altera's PCI Express IP Solutions web
page for support information on other device
families.
Related Information
•
Example Designs
Qsys example designs are available for the Arria 10 Avalon-MM DMA for PCI Express IP Core. You can
download them from the
<install_dir>/ip/altera/altera_pcie/altera_pcie_a10_ed/example_design/a10
directory.
Related Information
Getting Started with the Avalon-MM DMA
Debug Features
Debug features allow observation and control of the Hard IP for faster debugging of system-level
problems.
IP Core Verification
To ensure compliance with the PCI Express specification, Altera performs extensive verification. The
simulation environment uses multiple testbenches that consist of industry-standard bus functional
UG-01145_avmm_dma
2015.05.14
Device Family Support
1-7
Datasheet
Altera Corporation