Altera Arria 10 Avalon-MM DMA - Manual (Page 23)

Parameter Value Description
• Minimum RX Buffer credit allocation -performance for
received requests )—configures the minimum PCIe
specification allowed for non-posted and posted request
credits, leaving most of the RX Buffer space for received
completion header and data. Select this option for
variations where application logic generates many read
requests and only infrequently receives single requests
from the PCIe link.
• Low—configures a slightly larger amount of RX Buffer
space for non-posted and posted request credits, but still
dedicates most of the space for received completion header
and data. Select this option for variations for which
application logic generates many read requests and
infrequently receives small bursts of requests from the
PCIe link. This option is recommended for typical
endpoint applications in which most of the PCIe traffic is
generated by a DMA engine that is located in the endpoint
application layer logic.
• Balanced—configures approximately half the RX Buffer
space to received requests and the other half of the RX
Buffer space to received completions. Select this option for
applications in which the received requests and received
completions are roughly equal.
• High—configures most of the RX Buffer space for received
requests and allocates a slightly larger than minimum
amount of space for received completions. Select this
option if most of the PCIe requests are generated by the
other end of the PCIe link and the local application layer
logic only infrequently generates a small burst of read
requests. This option is recommended for typical Root Port
applications in which most of the PCIe traffic is generated
by DMA engines located in the endpoints.
• Maximum—configures the minimum PCIe specification
allowed amount of completion space, leaving most of the
RX Buffer space for received requests. Select this option
when most of the PCIe requests are generated by the other
end of the PCIe link and the local application layer logic
never or only infrequently generates single read requests.
This option is recommended for control and status
Endpoint applications that don't generate any PCIe
requests of their own and are the target only of write and
read requests from the root complex.
Use 62.5 MHz
application clock
On/Off
This mode is only available only for Gen1 ×1. It saves power.
UG-01145_avmm_dma
2015.05.14
System Settings 3-3
Parameter Settings Altera Corporation
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