Altera Arria 10 Avalon-MM DMA - Manual (Page 75)

PCI Express Capability Structures
Figure 6-2: MSI Capability Structure
0x050
0x054
0x058
Message Control
Configuration MSI Control Status
Register Field Descriptions
Next Cap Ptr
Message Address
Message Upper Address
Reserved Message Data
31 24 23 16 15 8 7 0
0x05C
Capability ID
Figure 6-3: MSI-X Capability Structure
0x068
0x06C
0x070
Message Control Next Cap Ptr
MSI-X Table Offset
MSI-X Pending Bit Array (PBA) Offset
31 24 23 16 15 8 7 0
Capability ID
3 2
MSI-X
Table BAR
Indicator
MSI-X
Pending
Bit Array
- BAR
Indicator
Figure 6-4: Power Management Capability Structure - Byte Address Offsets and Layout
0x078
0x07C
Capabilities Register Next Cap Ptr
Data
31 24 23 16 15 8 7 0
Capability ID
Power Management Status and Control
PM Control/Status
Bridge Extensions
6-6 PCI Express Capability Structures
UG-01145_avmm_dma
2015.05.14
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